74HCT373D,653 NXP Semiconductors, 74HCT373D,653 Datasheet - Page 14

• Manufacturer Part Number: 74HCT373D,653
• Description: IC LATCH TRANSP OCT D 3ST 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCTr
• Type: D-Typer

Specifications of 74HCT373D,653

• Logic Type: D-Type Transparent Latch
• Package / Case: 20-SOIC (7.5mm Width)
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 4.5 V ~ 5.5 V
• Independent Circuits: 1
• Delay Time - Propagation: 33ns
• Current - Output High, Low: 6mA, 6mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 8
• Logic Family: 74HCT
• Polarity: Non-Inverting
• High Level Output Current: - 6 mA
• Low Level Output Current: 6 mA
• Propagation Delay Time: 14 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Bits: 8
• Number Of Elements: 1
• Latch Mode: Transparent
• Technology: CMOS
• Package Type: SO
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1540-2; 74HCT373D-T; 933715580653

NXP Semiconductors
Table 9.
Voltages are referenced to GND (ground = 0 V); C
74HC_HCT373
Product data sheet
Symbol Parameter
T
t
t
t
t
t
t
t
T
t
t
t
t
t
t
pd
en
dis
t
W
su
h
pd
en
dis
t
W
su
amb
amb
= −40 °C to +85 °C
= −40 °C to +125 °C
propagation delay
enable time
disable time
transition time
pulse width
set-up time
hold time
propagation delay
enable time
disable time
transition time
pulse width
set-up time Dn to LE
Dynamic characteristics 74HCT373
All information provided in this document is subject to legal disclaimers.
Dn to Qn; see
LE HIGH; see
Dn to Qn; see
LE HIGH; see
Conditions
LE to Qn; see
OE to Qn; see
OE to Qn; see
Qn; see
Dn to LE; see
Dn to LE; see
LE to Qn; see
OE to Qn; see
OE to Qn; see
Qn; see
Dn to LE; see
Rev. 4 — 3 September 2010
…continued
L
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 50 pF unless otherwise specified; for test circuit see
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
Figure 8
Figure 8
Figure 11
Figure 11
Figure 11
Figure 9
Figure 9
Figure 8
Figure 9
Figure 8
Figure 9
Figure 10
Figure 10
Figure 10
Figure 10
and
and
Figure 9
Figure 9
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
[1]
[2]
[3]
[4]
[1]
[2]
[3]
[4]
Min
-
-
-
-
-
20
15
4
-
-
-
-
-
24
18
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
Figure
Max
38
40
40
38
15
-
-
-
45
48
48
45
18
-
-
12.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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