74HCT373D,653 NXP Semiconductors, 74HCT373D,653 Datasheet - Page 4
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74HCT373D,653
Manufacturer Part Number
74HCT373D,653
Description
IC LATCH TRANSP OCT D 3ST 20SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
D-Typer
Datasheet
1.74HC373PW118.pdf
(26 pages)
Specifications of 74HCT373D,653
Logic Type
D-Type Transparent Latch
Package / Case
20-SOIC (7.5mm Width)
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
33ns
Current - Output High, Low
6mA, 6mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
8
Logic Family
74HCT
Polarity
Non-Inverting
High Level Output Current
- 6 mA
Low Level Output Current
6 mA
Propagation Delay Time
14 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Technology
CMOS
Package Type
SO
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1540-2
74HCT373D-T
933715580653
74HCT373D-T
933715580653
NXP Semiconductors
5. Pinning information
Table 2.
74HC_HCT373
Product data sheet
Symbol
OE
Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7
D0, D1, D2, D3, D4, D5, D6, D7
GND
LE
V
Fig 6.
CC
Pin configuration DIP20, SO20, SSOP20 and
TSSOP20
Pin description
GND
5.1 Pinning
5.2 Pin description
OE
Q0
Q1
Q2
Q3
D0
D1
D2
D3
10
1
2
3
4
5
6
7
8
9
74HCT373
74HC373
001aae046
20
19
18
17
16
15
14
13
12
11
Pin
1
2, 5, 6, 9, 12, 15, 16, 19
3, 4, 7, 8, 13, 14, 17, 18
10
11
20
V
Q7
D7
D6
Q6
Q5
D5
D4
Q4
LE
All information provided in this document is subject to legal disclaimers.
CC
Rev. 4 — 3 September 2010
Fig 7.
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input.
Pin configuration DHVQFN20
Description
3-state output enable input (active LOW)
3-state latch output
data input
ground (0 V)
latch enable input (active HIGH)
supply voltage
index area
terminal 1
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
Q0
Q1
Q2
Q3
D0
D1
D2
D3
Transparent top view
2
3
4
5
6
7
8
9
74HCT373
74HC373
GND
(1)
19
18
17
16
15
14
13
12
001aae047
© NXP B.V. 2010. All rights reserved.
Q7
D7
D6
Q6
Q5
D5
D4
Q4
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