74HC75PW,118 NXP Semiconductors, 74HC75PW,118 Datasheet - Page 11
74HC75PW,118
Manufacturer Part Number
74HC75PW,118
Description
IC LATCH QUAD BISTABLE 16TSSOP
Manufacturer
NXP Semiconductors
Series
74HCr
Type
D-Typer
Datasheet
1.74HC75N652.pdf
(20 pages)
Specifications of 74HC75PW,118
Logic Type
D-Type Transparent Latch
Package / Case
16-TSSOP
Circuit
2:2
Output Type
Differential
Voltage - Supply
2 V ~ 6 V
Independent Circuits
2
Delay Time - Propagation
11ns
Current - Output High, Low
5.2mA, 5.2mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
4
Logic Family
HC
Polarity
Inverting/Non-Inverting
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
11 ns at 5 V
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Bits
4
Number Of Elements
2
Latch Mode
Transparent
Technology
CMOS
Package Type
TSSOP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
6V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74HC75PW-T
74HC75PW-T
935188530118
74HC75PW-T
935188530118
Philips Semiconductors
Table 8:
GND = 0 V; t
[1]
9397 750 13816
Product data sheet
Symbol
T
t
t
t
t
t
PHL
THL
W
su
h
amb
, t
, t
C
P
f
f
C
V
N = number of inputs switching;
i
o
D
CC
= 40 C to +125 C
PD
= input frequency in MHz;
L
(C
TLH
PLH
= output frequency in MHz;
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
PD
V
Dynamic characteristics
CC
r
= t
Parameter
propagation delay
nD to nQ
propagation delay
nD to nQ
propagation delay
LEnn to nQ
propagation delay
LEnn to nQ
output transition time
enable pulse width
HIGH
set-up time nD to
LEnn
hold time nD to LEnn
2
V
CC
f
= 6 ns; C
f
o
2
) = sum of outputs.
f
i
N + (C
L
= 50 pF; unless otherwise specified, see
L
V
CC
Conditions
see
see
see
see
see
see
see
see
…continued
2
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
f
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
o
Figure 6
Figure 7
Figure 9
Figure 9
Figure 6
Figure 9
Figure 8
Figure 8
) where:
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
= 2.0 V
= 4.5 V
= 6.0 V
Rev. 03 — 12 November 2004
and
7
D
in W).
Figure
10.
Min
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
120
24
20
90
18
15
3
3
3
Quad bistable transparant latch
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
165
33
28
180
36
31
180
36
31
190
38
32
110
22
19
-
-
-
-
-
-
-
-
-
74HC75
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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