74HCT4015D,112 NXP Semiconductors, 74HCT4015D,112 Datasheet - Page 2
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74HCT4015D,112
Manufacturer Part Number
74HCT4015D,112
Description
IC DUAL 4BIT SHIFT REG 16-SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Datasheets
1.74HCT4046ADB112.pdf
(19 pages)
2.74HCT4046ADB112.pdf
(23 pages)
3.74HCT4015N112.pdf
(8 pages)
Specifications of 74HCT4015D,112
Package / Case
16-SOIC (3.9mm Width)
Logic Type
Shift Register
Function
Serial to Parallel
Output Type
Standard
Number Of Elements
2
Number Of Bits Per Element
4
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Counting Sequence
Serial to Parallel
Number Of Circuits
2
Logic Family
HCT
Propagation Delay Time
18 ns
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-2842-5
933715230112
933715230112
Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC/HCT4015 are high-speed Si-gate CMOS
devices and are pin compatible with the “4015” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
December 1990
SYMBOL
t
f
C
C
PHL
max
Output capability: standard
I
Dual 4-bit serial-in/parallel-out shift
register
I
PD
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/ t
CC
PD
= input frequency in MHz
L
category: MSI
= output frequency in MHz
PLH
(C
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
D
L
= C
V
amb
CC
PD
2
= 25 C; t
PARAMETER
propagation delay nCP to nQ
maximum clock frequency
input capacitance
power dissipation capacitance per register notes 1 and 2
V
f
o
CC
) = sum of outputs
2
f
r
i
= t
I
I
f
= GND to V
= GND to V
= 6 ns
(C
L
V
CC
2
CC
CC
f
o
) where:
n
1.5 V
2
.
The 74HC/HCT4015 are dual edge-triggered 4-bit static
shift registers (serial-to-parallel converters). Each shift
register has a serial data input (1D and 2D), a clock input
(1CP and 2CP), four fully buffered parallel outputs (1Q
1Q
master reset (1MR and 2MR). Information present on nD
is shifted to the first register position, and all data in the
register is shifted one position to the right on the
LOW-to-HIGH transition of nCP.
A HIGH on nMR clears the register and forces nQ
to LOW, independent of nCP and nD.
CONDITIONS
C
D
L
3
in W):
= 15 pF; V
and 2Q
0
to 2Q
CC
= 5 V 16
3
) and an overriding asynchronous
110
3.5
35
HC
TYPICAL
74HC/HCT4015
Product specification
18
74
3.5
40
HCT
ns
MHz
pF
pF
0
UNIT
to nQ
0
to
3