74ACT299MTC Fairchild Semiconductor, 74ACT299MTC Datasheet

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74ACT299MTC

Manufacturer Part Number
74ACT299MTC
Description
IC SHIFT/REGISTER STORE 20TSSOP
Manufacturer
Fairchild Semiconductor
Series
74ACTr
Datasheet

Specifications of 74ACT299MTC

Logic Type
Shift Register
Output Type
Standard
Number Of Elements
1
Number Of Bits Per Element
8
Function
Universal
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74ACT299MTCX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
© 2005 Fairchild Semiconductor Corporation
74AC299SC
74AC299SCX_NL
(Note 1)
74AC299SJ
74AC299MTC
74AC299PC
74ACT299SC
74ACT299MTC
74ACT299PC
74AC299 • 74ACT299
8-Input Universal Shift/Storage Register
with Common Parallel I/O Pins
General Description
The AC/ACT299 is an 8-bit universal shift/storage register
with 3-STATE outputs. Four modes of operation are possi-
ble: hold (store), shift left, shift right and load data. The par-
allel load inputs and flip-flop outputs are multiplexed to
reduce the total number of package pins. Additional out-
puts are provided for flip-flops Q
cascading. A separate active LOW Master Reset is used to
reset the register.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Connection Diagram
FACT
Order Number
¥
is a trademark of Fairchild Semiconductor Corporation.
Package Number
MTC20
MTC20
M20D
M20B
M20B
M20B
N20A
N20A
0
, Q
7
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300"
Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
to allow easy serial
DS009893
Features
Pin Descriptions
I
Common parallel I/O for reduced pin count
Additional serial inputs and outputs for expansion
Four operating modes: shift left, shift right, load
and store
3-STATE outputs for bus-oriented applications
Outputs source/sink 24 mA
ACT299 has TTL-compatible inputs
CC
CP
DS
DS
S
MR
OE
I/O
Q
0
Pin Names
0
, S
, Q
and I
0
7
0
1
Package Description
–I/O
, OE
1
7
OZ
7
2
reduced by 50%
Clock Pulse Input
Serial Data Input for Right Shift
Serial Data Input for Left Shift
Mode Select Inputs
Asynchronous Master Reset
3-STATE Output Enable Inputs
Parallel Data Inputs or
Serial Outputs
3-STATE Parallel Outputs
July 1988
Revised March 2005
Description
www.fairchildsemi.com

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74ACT299MTC Summary of contents

Page 1

... N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 74ACT299SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ACT299MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACT299PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “ ...

Page 2

Logic Symbols IEEE/IEC www.fairchildsemi.com Truth Table Inputs Response Asynchronous Reset Parallel Load; I Shift Right ...

Page 3

Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com ...

Page 4

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current (I ...

Page 5

DC Electrical Characteristics for AC Symbol Parameter I Maximum I/O Leakage Current OZT Note 3: All outputs loaded; threshold on input associated with output under test. Note 4: Maximum test duration 20 ms, one output loaded at a time. Note ...

Page 6

AC Electrical Characteristics for AC Symbol Parameter f Maximum Input MAX Frequency t Propagation Delay PLH (Shift Left or Right Propagation Delay PHL (Shift Left or Right) ...

Page 7

AC Electrical Characteristics for ACT Symbol Parameter f Maximum Input Frequency MAX t Propagation Delay PLH (Shift Left or Right Propagation Delay PHL (Shift Left or Right) ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide www.fairchildsemi.com Package Number M20B 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide www.fairchildsemi.com Package Number MTC20 10 ...

Page 11

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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