74AHC594BQ,115 NXP Semiconductors, 74AHC594BQ,115 Datasheet - Page 5

IC SHIFT REGISTER 8BIT 16-HVQFN

74AHC594BQ,115

Manufacturer Part Number
74AHC594BQ,115
Description
IC SHIFT REGISTER 8BIT 16-HVQFN
Manufacturer
NXP Semiconductors
Series
74AHCr
Datasheet

Specifications of 74AHC594BQ,115

Package / Case
16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
Logic Type
Shift Register
Function
Serial to Parallel
Output Type
Standard
Number Of Elements
1
Number Of Bits Per Element
8
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Counting Sequence
Serial to Serial/Parallel
Number Of Circuits
1
Logic Family
AHC
Propagation Delay Time
12.1 ns, 8.8 ns
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AHC594BQ-G
74AHC594BQ-G
935282022115
NXP Semiconductors
Table 2.
7. Functional description
Table 3.
[1]
74AHC_AHCT594_2
Product data sheet
Symbol
Q1
Q2
Q3
Q4
Q5
Q6
Q7
GND
Q7S
SHR
SHCP
STCP
STR
DS
Q0
V
Input
SHCP STCP SHR
X
X
X
X
CC
H = HIGH voltage state;
L = LOW voltage state;
X = don’t care;
NC = no change;
= LOW to HIGH transition;
X
X
X
Pin description
Function table
L
X
L
H
H
H
6.2 Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
STR
X
L
H
X
H
H
[1]
DS
X
X
X
H
X
X
Output
Q7S
L
NC
L
Q6S
NC
Q6S
Description
parallel data output
parallel data output
parallel data output
parallel data output
parallel data output
parallel data output
parallel data output
ground (0 V)
serial data output
shift register reset input (active LOW)
shift register clock input
storage register clock input
storage register reset input (active LOW)
serial data input
parallel data output
supply voltage
Qn
NC
L
L
NC
QnS
QnS
Rev. 02 — 9 June 2008
Function
a LOW-state on SHR only affects the shift register
a LOW-state on STR only affects the storage register
empty shift register loaded into storage register
logic HIGH level shifted into shift register stage 0. Contents of all
shift register stages shifted through, e.g. previous state of stage 6
(internal Q6S) appears on the serial output (Q7S).
contents of shift register stages (internal QnS) are transferred to
the storage register and parallel output stages
contents of shift register shifted through; previous contents of the
shift register is transferred to the storage register and the parallel
output stages
74AHC594; 74AHCT594
8-bit shift register with output register
© NXP B.V. 2008. All rights reserved.
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