HEF4794BT,118 NXP Semiconductors, HEF4794BT,118 Datasheet
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HEF4794BT,118
Specifications of HEF4794BT,118
935069140118
HEF4794BT,118
HEF4794BTD-T
HEF4794BTD-T
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HEF4794BT,118 Summary of contents
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HEF4794B 8-stage shift-and-store register LED driver Rev. 6 — 1 September 2010 1. General description The HEF4794B is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input (D) ...
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... NXP Semiconductors 5. Functional diagram 3 CP STR Fig 1. Logic symbol STAGE LATCH 0 STR OE Fig 3. Logic diagram HEF4794B Product data sheet 1 QS1 9 QS2 10 QP0 4 5 QP1 QP2 6 QP3 7 QP4 14 QP5 13 QP6 12 QP7 11 001aaf111 Fig 2. STAGES QP2 QP4 QP0 QP1 QP3 QP5 All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 4. Pin configuration HEF4794B Product data sheet 8-stage shift-and-store register LED driver HEF4794B STR QP4 QP0 4 13 QP5 5 12 QP1 QP6 QP2 6 11 QP7 7 10 QP3 QS2 QS1 SS 001aag800 All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 6.2 Pin description Table 2. Pin description Symbol Pin D 2 QP0 to QP7 14, 13, 12, 11 QS1 9 QS2 STR Functional description [1] Table 3. Function table Input CP OE STR ↑ ↓ ↑ ↑ ↑ ↓ [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state; ...
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... NXP Semiconductors clock input data input strobe input output enable input internal Q0S (FF0) QP0 output internal Q6S (FF6) QP6 output serial QS1 output serial QS2 output Fig 5. Timing diagram 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). ...
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... NXP Semiconductors 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage DD V input voltage I T ambient temperature amb Δt/ΔV input transition rise and fall rate 10. Static characteristics Table 6. Static characteristics unless otherwise specified Symbol Parameter Conditions |I | < 1 μA ...
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... NXP Semiconductors Table 6. Static characteristics unless otherwise specified Symbol Parameter Conditions I OFF-state QPn output OZ output current is HIGH supply current input I capacitance 11. Dynamic characteristics Table 7. Dynamic characteristics ° unless otherwise specified. For test circuit, see SS amb Symbol Parameter t HIGH to LOW PHL propagation delay ...
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... NXP Semiconductors Table 7. Dynamic characteristics ° unless otherwise specified. For test circuit, see SS amb Symbol Parameter t enable time en t disable time dis t transition time t t pulse width W t set-up time su t hold time h f maximum clock clk(max) frequency [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C ...
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... NXP Semiconductors 12. Waveforms CP input QPn output QS1 output QS2 output Parallel output measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 6. Propagation delay clock (CP) to output (QPn, QS1, QS2), clock pulse width and maximum clock frequency Table 9 ...
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... NXP Semiconductors LOW to OFF-state OFF-state to LOW Measurement points are given the typical output voltage level that occurs with the output load. OL Fig 8. Enable and disable times for input OE CP input QPn output Measurement points are given in The shaded areas indicate when the input is permitted to change for predictable output performance. ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit: DUT - Device Under Test Load resistance load capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 10. Test circuit for measuring switching times Table 10. Test data ...
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... NXP Semiconductors 13. Application information Application example: serial-to-parallel data converting LED drivers QP0 D OE STR PWM dimmer input CONTROL AND SYNC CIRCUITRY data clock from remote control panel Fig 11. Serial-to-parallel converting LED drivers HEF4794B Product data sheet QP7 QP0 HEF4794B All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 14. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...
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... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors 15. Revision history Table 11. Revision history Document ID Release date HEF4794B v.6 20100901 • Modifications: Section 8 “Limiting values” HEF4794B v.5 20100402 • Modifications: Section 5 “Functional diagram” • Section 13 “Application information” HEF4794B v.4 20091222 • Modifications: Section 2 “Features and benefits” ESD data removed. ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: HEF4794B Product data sheet 16 ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 Application information ...