MT48LC32M16A2P-75 IT Micron Semiconductor Products, MT48LC32M16A2P-75 IT Datasheet

MT48LC32M16A2P-75 IT

Manufacturer Part Number

MT48LC32M16A2P-75 IT

Description

Manufacturer

Micron Semiconductor Products

Datasheet

1.MT48LC128M4A2TG-7E.pdf (68 pages)

Current page: 1 of 68
Download datasheet (3Mb)

Synchronous DRAM

MT48LC128M4A2 – 32 Meg x 4 x 4 banks

MT48LC64M8A2 – 16 Meg x 8 x 4 banks

MT48LC32M16A2 – 8 Meg x 16 x 4 banks

For the latest data sheet, refer to Micron’s Web site

Features

• PC100- and PC133-compliant

• Fully synchronous; all signals registered on positive

• Internal pipelined operation; column address can be

• Internal banks for hiding row access/precharge

• Programmable burst lengths: 1, 2, 4, 8, or full page

• Auto precharge, includes concurrent auto precharge,

• Self refresh mode

• 64ms, 8,192-cycle refresh

• LVTTL-compatible inputs and outputs

• Single +3.3V ±0.3V power supply

Table 1:

Table 2:

PDF: 09005aef809bf8f3/Source: 09005aef80818a4a

512MbSDRAMfront.fm - Rev. L 10/07 EN

Configuration 32 Meg x 4

Refresh count

Row

addressing

Bank

addressing

Column

addressing

Speed

Grade

Parameter

edge of system clock

changed every clock cycle

and auto refresh modes

-7E

-75

-7E

-75

Frequency

100 MHz

143 MHz

133 MHz

MT48LC32M16A2P-75:C

Clock

Address Table

Key Timing Parameters

Products and specifications discussed herein are subject to change by Micron without notice.

8K (A0–A12) 8K (A0–A12)

4 (BA0, BA1) 4 (BA0, BA1) 4 (BA0, BA1)

32 Meg x 4 32 Meg x 8 32 Meg x 16

4K (A0–A9,

Part Number Example:

A11, A12)

x 4 banks

CL = 2 CL = 3

5.4ns

Access Time

6ns

–

16 Meg x 8

2K (A0–A9,

x 4 banks

5.4ns

A11)

–

Setup

Time

1.5ns

8K (A0–A12)

1K (A0–A9)

8 Meg x 16

x 4 banks

Hold

Time

0.8ns

Notes: 1. Refer to Micron technical note: TN-48-05.

Options

• Configurations

• WRITE recovery (

• Plastic package – OCPL

• Timing (cycle time)

• Self refresh

• Operating temperature range

• Revision

– 128 Meg x 4 (32 Meg x 4 x 4 banks)

– 64 Meg x 8 (16 Meg x 8 x 4 banks)

– 32 Meg x 16 (8 Meg x 16 x 4 banks)

–

– 54-pin TSOP II (400 mil)

– 54-pin TSOP II (400 mil) Pb-free

– 7.5ns @ CL = 2 (PC133)

– 7.5ns@ CL = 3 (PC133)

– Standard

– Low power

– Commercial (0

– Industrial (–40

WR = “2 CLK”

Micron Technology, Inc., reserves the right to change products or specifications without notice.

2. Off-center parting line.

3. Contact factory for availability.

4. Available on x4 and x8 only.

512Mb: x4, x8, x16 SDRAM

C +85

C to +70

WR)

Marking

Features

128M4

32M16

64M8

None

-7E

-75

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