HMS81008E Hynix Semiconductor, HMS81008E Datasheet - Page 53

• Manufacturer Part Number: HMS81008E
• Description: HYNIX SEMICONDUCTOR 8-BIT SINGLE-CHIP MICROCONTROLLERS
• Manufacturer: Hynix Semiconductor

14.4 Interrupt Sequence
An interrupt request is held until the interrupt is accepted or the
interrupt latch is cleared to “0” by a reset or an instruction. Inter-
rupt acceptance sequence requires 8 f
the current instruction execution. The interrupt service task is ter-
minated upon execution of an interrupt return instruction [RETI].
Interrupt acceptance
1. The interrupt master enable flag (I-flag) is cleared to
HMS81004E/08E/16E/24E/32E
50
l
“0” to temporarily disable the acceptance of any follow-
ing maskable interrupts. When a non-maskable inter-
rupt is accepted, the acceptance of any following
interrupts is temporarily disabled.
Interrupt mode register
IMOD
Priority
00: Fixed by hardware
01: Changeable by IP3~IP0
1x: Interrupt is inhibited
Figure 14-3 Interrupt Accept Mode & Selection by IP3~IP0
XIN
R/W
7
-
after the completion of
R/W
6
-
R/W
IM 1
5
R/W
IM 0
4
BTCL
R/W
IP 3
3
R/W
IP 2
2. Interrupt request flag for the interrupt source accepted is
3. The contents of the program counter (return address)
4. The entry address of the interrupt service program is
5. The instruction stored at the entry address of the inter-
2
cleared to “0”.
and the program status word are saved (pushed) onto the
stack area. The stack pointer decreases 3 times.
read from the vector table address and the entry address
is loaded to the program counter.
rupt service program is executed.
R/W
IP1
1
R/W
IP0
0
Selection interrupt
0001: KSCNR
0010: INT1R
0011: INT2R
0101: T0R
0110: T1R
0111: T2R
1010: WDTR
1011: BITR
ADDRESS: 0CA
INITIAL VALUE: --00_0000
H
JUNE 2001 Ver 1.00
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