74HC237N,652 NXP Semiconductors, 74HC237N,652 Datasheet

IC DECODER/DEMUX 3-8LINE 16DIP

74HC237N,652

Manufacturer Part Number
74HC237N,652
Description
IC DECODER/DEMUX 3-8LINE 16DIP
Manufacturer
NXP Semiconductors
Series
74HCr
Type
Decoder/Demultiplexerr
Datasheet

Specifications of 74HC237N,652

Package / Case
16-DIP (0.300", 7.62mm)
Circuit
1 x 3:8
Independent Circuits
1
Current - Output High, Low
5.2mA, 5.2mA
Voltage Supply Source
Single Supply
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Logic Family
74HC
Number Of Bits
3
Number Of Lines (input / Output)
6.0 / 8.0
Propagation Delay Time
38 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Number Of Input Lines
6.0
Number Of Output Lines
8.0
Power Dissipation
750 mW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1416-5
74HC237N
933757180652
1. General description
2. Features and benefits
3. Ordering information
Table 1.
Type number Package
74HC237N
74HC237D
74HC237DB
Ordering information
Temperature range
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power
Schottky TTL (LSTTL). The 74HC237 is specified in compliance with JEDEC
standard no. 7A.
The 74HC237 is a 3-to-8 line decoder, demultiplexer with latches at the three address
inputs (An). The 74HC237 essentially combines the 3-to-8 decoder function with a 3-bit
storage latch. When the latch is enabled (LE = LOW), the 74HC237 acts as a 3-to-8 active
LOW decoder. When the latch enable (LE) goes from LOW-to-HIGH, the last data present
at the inputs before this transition, is stored in the latches. Further address changes are
ignored as long as LE remains HIGH. The output enable input (E1 and E2) controls the
state of the outputs independent of the address inputs or latch operation. All outputs are
HIGH unless E1 is LOW and E2 is HIGH. The 74HC237 is ideally suited for implementing
non-overlapping decoders in 3-state systems and strobed (stored address) applications in
bus oriented systems.
74HC237
3-to-8 line decoder, demultiplexer with address latches
Rev. 4 — 10 January 2011
Combines 3-to-8 decoder with 3-bit latch
Multiple input enable for easy expansion or independent controls
Active HIGH mutually exclusive outputs
Low-power dissipation
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
HBM JESD22-A114F exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Name
DIP16
SO16
SSOP16
Description
plastic dual in-line package; 16 leads (300 mil)
plastic small outline package; 16 leads; body width
3.9 mm
plastic shrink small outline package; 16 leads;
body width 5.3 mm
Product data sheet
Version
SOT38-4
SOT109-1
SOT338-1

Related parts for 74HC237N,652

74HC237N,652 Summary of contents

Page 1

Rev. 4 — 10 January 2011 1. General description The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The 74HC237 is specified in ...

Page 2

... NXP Semiconductors 4. Functional diagram Fig 1. Functional diagram INPUT A1 LATCHES Fig 2. Logic symbol 74HC237 Product data sheet 3-to-8 line decoder, demultiplexer with address latches INPUT LATCHES DECODER DECODER 001aab869 Fig 3. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2011 ...

Page 3

... NXP Semiconductors Fig 4. Logic diagram 5. Pinning information 5.1 Pinning 74HC237 GND 001aab868 Fig 5. Pin configuration DIP16 and SO16 74HC237 Product data sheet 3-to-8 line decoder, demultiplexer with address latches A0 LATCH LATCH LATCH Fig 6. All information provided in this document is subject to legal disclaimers. ...

Page 4

... NXP Semiconductors 5.2 Pin description Table 2. Pin description Symbol Pin 15, 14, 13, 12, 11, 10 output GND Functional description Table 3: Function table Enable Input [ HIGH voltage level LOW voltage level don’t care high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

Page 5

... NXP Semiconductors derates linearly with 12 mW/K above 70 C. [1] For DIP16 package: P tot derates linearly with 8 mW/K above 70 C. [2] For SO16 package: P tot derates linearly with 5.5 mW/K above 60 C. For SSOP16 package: P tot 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) ...

Page 6

... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions I input leakage current supply current 6 input I capacitance 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter Conditions t propagation An to Yn; see ...

Page 7

... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); C Symbol Parameter Conditions t pulse width LE HIGH; see set-up time An to LE; see hold time An to LE; see power pF MHz dissipation V = GND capacitance [ the same as t and PLH PHL [ the same as t and t ...

Page 8

... NXP Semiconductors Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 8. Propagation enable inputs (E1) to output (Yn) and output transition time Measurement points are given in V and V are typical voltage output levels that occur with the output load. ...

Page 9

... NXP Semiconductors Test data is given in Table Definitions test circuit Termination resistance should be equal to output impedance Load capacitance including jig and probe capacitance Load resistance Test selection switch. Fig 10. Test circuit for measuring switching times Table 9. Test data Type Input V I 74HC237 ...

Page 10

... NXP Semiconductors 12. Application information strobe decoder enable input 0 address 237 outputs Fig 11. 6-to-64 line decoder with input address storage 74HC237 Product data sheet 3-to-8 line decoder, demultiplexer with address latches 237 237 outputs All information provided in this document is subject to legal disclaimers. ...

Page 11

... NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 12

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 13

... NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 5 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT338-1 Fig 14. Package outline SOT338-1 (SSOP16) ...

Page 14

... Data sheet status Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Corrected the application drawing. Product data sheet ...

Page 15

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 16

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 17. Contact information For more information, please visit: For sales office addresses, please send an email to: 74HC237 Product data sheet 3-to-8 line decoder, demultiplexer with address latches 16 ...

Page 17

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Application information Package outline ...

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