MT9072AV ZARLINK [Zarlink Semiconductor Inc], MT9072AV Datasheet - Page 151

• Manufacturer Part Number: MT9072AV
• Description: Octal T1/E1/J1 Framer
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Bit
12
11
10
9
8
7
6
5
4
3
Name
F3SM
F2HM
F2EM
F2RM
F2SM
F1HM
F1EM
F1RM
F1SM
F0HM
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
Framer 3 Sync and Overflow Mask. This is the mask bit for the F3SVS status bit in the Interrupt
Vector Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 2 HDLC Mask. This is the mask bit for the F2HVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 2 Elastic Mask. This is the mask bit for the F2EVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 2 Rx Line Mask. This is the mask bit for the F2RVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 2 Sync and Overflow Mask. This is the mask bit for the F2SVS status bit in the Interrupt
Vector Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 1 HDLC Mask. This is the mask bit for the F1HVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 1 Elastic Mask. This is the mask bit for the F1EVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 1 Rx Line Mask. This is the mask bit for the F1RVS status bit in the Interrupt Vector
Register(address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 1 Sync and Overflow Mask. This is the mask bit for the F1SVS status bit in the Interrupt
Vector Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit
will remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Framer 0 HDLC Mask. This is the mask bit for the F0HVS status bit in the Interrupt Vector
Register (address 910). If this mask bit is one, the corresponding Interrupt Vector status bit will
remain inactive (zero). If this mask bit is zero, the corresponding Interrupt Vector status bit will
function normally.
Table 121 - Interrupt Vector 1 Mask Register (Address 902) (T1)
Zarlink Semiconductor Inc.
MT9072
Functional Description
151
Data Sheet