ZL50017GAC ZARLINK [Zarlink Semiconductor Inc], ZL50017GAC Datasheet - Page 30

• Manufacturer Part Number: ZL50017GAC
• Description: 1 K Digital Switch
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

15 - 9
External Read/Write Address: 0001
Reset Value: 0000
5 - 4
3 - 1
Bit
8
7
6
0
15
0
14
0
STIO_PD_
BPD2 - 0
Unused
Unused
Unused
MBPS
Name
BDL
EN
H
13
0
12
0
Reserved. In normal functional mode, these bits MUST be set to zero.
STio Pull-down Enable
When this bit is low, the pull-down resistors on all STio pads will be disabled.
When this bit is high, the pull-down resistors on all STio pads will be enabled.
Reserved. In normal functional mode, these bits MUST be set to zero.
Bi-directional Control
Reserved. In normal functional mode, these bits MUST be set to zero.
Block Programming Data
These bits refer to the value to be loaded into the connection memory, whenever the
memory block programming feature is activated. After the MBPE bit in the Control
Register is set to high and the MBPS bit in this register is set to high, the contents of
the bits BPD2 - 0 are loaded into bits 2 - 0 of the Connection Memory Low. Bits 15 - 3
of the Connection Memory Low.
Memory Block Programming Start:
A zero to one transition of this bit starts the memory block programming function. The
MBPS and BPD2 - 0 bits in this register must be defined in the same write operation.
Once the MBPE bit in the Control Register is set to high, the device requires two
frames to complete the block programming. After the programming function has fin-
ished, the MBPS bit returns to low, indicating the operation is completed. When MBPS
is high, MBPS or MBPE can be set to low to abort the programming operation.
Whenever the microprocessor writes a one to the MBPS bit, the block programming
function is started. As long as this bit is high, the user must maintain the same logical
value to the other bits in this register to avoid any change in the device setting.
Table 5 - Internal Mode Selection Register (IMS) Bits
11
0
H
10
0
9
0
Zarlink Semiconductor Inc.
PD_EN
STIO_
BDL
0
1
8
ZL50017
30
7
0
STio0-15 are bi-directional
STi0-15 tied low internally
bi-directional operation:
STio0 - 15 Operation
STio0-15 are outputs
STi0-15 are inputs
normal operation:
Description
BDL
6
5
0
4
0
BPD
3
2
BPD
2
1
BPD
1
0
Data Sheet
MBPS
0