ZL50022GAC ZARLINK [Zarlink Semiconductor Inc], ZL50022GAC Datasheet - Page 88

• Manufacturer Part Number: ZL50022GAC
• Description: Enhanced 4 K Digital Switch with Stratum 4E DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

When CMM is one, the device is programmed to perform one of the special per-channel transmission modes. Bits
PCC0 and PCC1 from connection memory are used to select the per-channel tristate, message or BER test mode
as shown in Table 54 on page 88.
Note: For proper
14 - 11
10 - 3
2 - 1
Bit
15
0
UA
EN
15
14
Table 54 - Connection Memory Low (CM_L) Bit Assignment when CMM = 1
0
MSG7 - 0
PCC1 - 0
CMM = 1
Unused
Name
UAEN
13
0
µ-
law/A-law conversion, the CM_H bits should be set before Bit 15 (UAEN bit) is set to high.
12
0
11
Conversion between µ-law and A-law Enable (Message mode only)
When this bit is low, message mode has no µ-law/A-law conversion. Connec-
tion memory high will be ignored.
When this bit is high, message mode has µ-law/A-law conversion, and con-
nection memory high controls the conversion method.
Reserved
In normal functional mode, these bits MUST be set to zero.
Message Data Bits
8-bit data for the message mode. Not used in the per-channel tristate and
BER test modes.
Per-Channel Control Bits
These two bits control the corresponding entry’s value on the STio stream.
Connection Memory Mode = 1
If this is high, the connection memory is in the per-channel control mode
which is per-channel tristate, per-channel message mode or per-channel BER
mode.
0
MSG
10
7
MSG
9
6
Zarlink Semiconductor Inc.
PC
C1
MSG
0
0
1
1
8
5
ZL50022
MSG
PC
C0
0
1
0
1
88
7
4
MSG
6
3
Description
Channel Output Mode
Per Channel Tristate
BER Test Mode
MSG
Message Mode
5
2
Reserved
MSG
4
1
MSG
3
0
PCC
2
1
PCC
1
0
Data Sheet
CMM
=1
0