ZL50023GAC ZARLINK [Zarlink Semiconductor Inc], ZL50023GAC Datasheet

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ZL50023GAC

Manufacturer Part Number
ZL50023GAC
Description
Enhanced 4 K Digital Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ZL50023GAC
Manufacturer:
ATMEL
Quantity:
1 063
MODE_4M1
MODE_4M0
Features
STi[31:0]
4096 channel x 4096 channel non-blocking digital
Time Division Multiplex (TDM) switch at
8.192 Mbps and 16.384 Mbps or using a
combination of ports running at 2.048 Mbps,
4.096 Mbps, 8.192 Mbps and 16.384 Mbps
32 serial TDM input, 32 serial TDM output
streams
Output streams can be configured as bi-
directional for connection to backplanes
Exceptional input clock cycle to cycle variation
tolerance (20 ns for all rates)
Per-stream input and output data rate conversion
selection at 2.048 Mbps, 4.096 Mbps 8.192 Mbps
or 16.384 Mbps. Input and output data rates can
differ
Per-stream high impedance control outputs
(STOHZ) for 16 output streams
Per-stream input bit delay with flexible sampling
point selection
CKi
FPi
V
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
DD_CORE
S/P Converter
Input Timing
V
Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved.
DD_IO
Figure 1 - ZL50023 Functional Block Diagram
V
DD_COREA
Microprocessor Interface
Zarlink Semiconductor Inc.
Internal Registers &
Connection Memory
Data Memory
V
DD_IOA
1
V
Per-stream output bit and fractional bit
advancement
Per-channel ITU-T G.711 PCM A-Law/µ-Law
Translation
Four frame pulse and four reference clock outputs
Three programmable delayed frame pulse outputs
Input clock: 4.096 MHz, 8.192 MHz, 16.384 MHz
Input frame pulses: 61 ns, 122 ns, 244 ns
Per-channel constant or variable throughput delay
for frame integrity and low latency applications
SS
ZL50023GAC 256-ball PBGA
ZL50023QCC 256-lead LQFP
RESET
Enhanced 4 K Digital Switch
P/S Converter
Ordering Information
Output Timing
Test Port
Output HiZ
-40°C to +85°C
Control
ODE
Data Sheet
ZL50023
STio[31:0]
STOHZ[15:0]
FPo[3:0]
CKo[3:0]
FPo_OFF[2:0]
October 2004

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