ZL50023GAC ZARLINK [Zarlink Semiconductor Inc], ZL50023GAC Datasheet - Page 63
ZL50023GAC
Manufacturer Part Number
ZL50023GAC
Description
Enhanced 4 K Digital Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50023GAC.pdf
(80 pages)
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† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C, VDD_CORE at 1.8 V and VDD_IO at 3.3 V and are for design aid only: not guaranteed and not subject to produc-
AC Electrical Characteristics
tion testing.
1
2
3
4
5
6
7
8
9
TRST
TCK Clock Period
TCK Clock Pulse Width High
TCK Clock Pulse Width Low
TMS Set-up Time
TMS Hold Time
TDi Input Set-up Time
TDi Input Hold Time
TDo Output Delay
TRST pulse width
TMS
TDi
TCK
TDo
t
TMSS
t
Characteristic
TDIS
†
- JTAG Test Port Timing
Figure 24 - JTAG Test Port Timing Diagram
t
TDIH
t
TMSH
t
TCKL
Zarlink Semiconductor Inc.
ZL50023
t
TCKH
63
t
TRSTW
t
t
t
t
Sym.
t
t
t
t
TMSS
TMSH
TDOD
TCKP
TCKH
TCKL
TDIH
TDIS
t
TCKP
t
Min.
100
200
TDOD
20
20
10
10
20
60
Typ.
‡
Max.
30
t
TRSTW
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Sheet
C
L
Notes
= 30 pF
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