ZL50031QEG1 ZARLINK [Zarlink Semiconductor Inc], ZL50031QEG1 Datasheet - Page 62
ZL50031QEG1
Manufacturer Part Number
ZL50031QEG1
Description
Flexible 4 K x 2 K Channel Digital Switch with H.110 Interface and 2 K x 2 K Local Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50031QEG1.pdf
(74 pages)
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† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C and are for design aid only: not guaranteed and not subject to production testing.
Note 1:
AC Electrical Characteristics
1
2
3
4
5
6
7
8
Local Frame Boundary Offset
ST_FPo0/1 Width
ST_FPo0/1 Output Delay from Falling edge
of ST_FPo0/1 to falling edge of ST_CKo0/1
ST_FPo0/1 Output Delay from Falling edge
of ST_CKo0-1 to rising edge of ST_FPo0/1
ST_CKo0/1 Clock Period
ST_CKo0/1 Clock Pulse Width High
ST_CKo0/1 Clock Pulse Width Low
ST_CKo0/1 Clock Rise/Fall Time
No jitter presented on input reference clock.
(8.192 MHz)
ST_CKo0/1
ST_FPo0/1
Figure 27 - Local Clock Timing Diagram when ST_CKo0/1 frequency = 8.192 MHz
Characteristic
Backplane Frame Boundary
†
t
- Local Frame Pulse and Clock Timing,
CL8
1
Zarlink Semiconductor Inc.
t
t
FODF8
t
FPW8
CH8
ZL50031
t
t
t
t
Sym.
FODR8
LFBOS
FODF8
t
FPW8
t
t
t
t
rC8o
fC8o
CP8
Ch8
CL8
62
,
t
LFBOS
114.5
114.5
Min.
t
57.3
57.3
57.3
57.3
FODR8
6.5
t
CP8
Local Output Frame Boundary
Typ.
122
122
ST_CKo0 = 8.192 MHz
‡
t
rC8o
129.5
129.5
Max.
64.8
64.8
64.8
64.8
25
14
Units
ns
ns
ns
ns
ns
ns
ns
ns
t
fC8o
C
L
=30 pF
Data Sheet
Notes
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