ZL50052GAC ZARLINK [Zarlink Semiconductor Inc], ZL50052GAC Datasheet - Page 22
ZL50052GAC
Manufacturer Part Number
ZL50052GAC
Description
8 K Channel Digital Switch with High Jitter Tolerance, Single Rate (32 Mbps), and 16 Inputs and 16 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50052GAC.pdf
(59 pages)
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5.0
Serial data which goes into the device is converted into parallel format and written to consecutive locations in the
data memory. Each data memory location corresponds to the input stream and channel number. Channels written
to any of the buffers during Frame N will be read out during Frame N+2. The input bit delay and output bit
advancement have no impact on the overall data throughput delay.
In the following paragraphs, the data throughput delay (T) is represented as a function of ST-BUS frames, input
channel number, (m), and output channel number (n). For 32.768 Mbps data rate, there are 512 channels on each
stream. The input channel number (m) and output channel number (n) can therefore have a range of 0 to 511. The
data throughput delay under various input channel and output channel conditions can be summarized as:
T = 2 frames + (n - m)
The data throughput delay (T) is: T = 2 frames + (n - m). Assuming that m (input channel) and n (output channel)
are equal, we have the figure below, in which the delay between the input data being written and the output data
being read is exactly 2 frames.
Serial Output Data
Serial Input Data
Data Delay Through the Switching Paths
Frame
(input pin)
RESET
Table 1 - Local and Backplane Output Enable Control Priority (continued)
Figure 11 - Data Throughput Delay with Input Ch0 Switched to Output Ch0
1
1
1
1
Frame N-2 Data
Frame N
Frame N Data
(input pin)
ODE
1
1
1
1
Frame N+1Data
Frame N-1 Data
Frame N+1
2 Frames + 0
Register bit)
(Control
Zarlink Semiconductor Inc.
OSB
0
1
1
1
Frame N+2 Data
ZL50052
Frame N+2
Frame N Data
22
Memory bit)
Connection
Backplane
(Local /
LE/BE
Frame N+3 Data
Frame N+1 Data
X
Frame N+3
0
0
1
LORS/BORS
(input pin)
Frame N+4 Data
Frame N+2 Data
Frame N+4
X
1
0
1
(HIGH or LOW)
Frame N+5 Data
Frame N+3 Data
Frame N+5
LSTo0-7/
BSTo0-7
ACTIVE
HIGH
HI-Z
HI-Z
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