ZL50110_08 ZARLINK [Zarlink Semiconductor Inc], ZL50110_08 Datasheet - Page 26

• Manufacturer Part Number: ZL50110_08
• Description: 128, 256, 512 and 1024 Channel CESoP Processors
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

TDM_STo[15:0]
TDM_CLKi[15:0]
Signal
Table 3 - TDM Interface ZL50112 Stream Pin Definition (continued)
I/O
OT
I D
Package Balls
ZL50110/11/12/14
Zarlink Semiconductor Inc.
[15]
[14]
[13]
[12]
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
[15]
[14]
[13]
[12]
[11]
[10]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
26
E14
A15
A14
B13
F13
B10
C10
E11
A7
B7
A5
A4
D7
F8
A2
B2
B15
F14
C13
B12
A11
A10
B9
E12
C8
C7
D9
E10
B4
F10
D6
E7
TDM port serial data output streams. For
different standards these pins are given
different identities:
ST-BUS: TDM_STo[15:0]
H.110:
H-MVIP: TDM_HDS[15:0]
Triggered on rising edge or falling edge
depending on standard. At 8.192 Mbps only
streams [3:0] are used, with 128 channels
per stream. Streams [3:0] are used for J2.
TDM port clock inputs. Programmable as
active high or low. Can accept frequencies
of 1.544 MHz, 2.048 MHz, 4.096 MHz,
6.312 MHz, 8.192 MHz, 16.384 MHz,
34.368 MHz or 44.736 MHz depending on
standard used. At 8.192 Mbps only streams
[3:0] are used. Streams [3:0] are used for
J2.
TDM_D[15:0]
Description
Data Sheet