HC230 ALTERA [Altera Corporation], HC230 Datasheet - Page 15

• Manufacturer Part Number: HC230
• Description: HardCopy II Device Family
• Manufacturer: ALTERA [Altera Corporation]

Figure 2–2. Stratix II DSP Block versus HardCopy II HCell 18 × 18-Bit Multiplier Implementation
Altera Corporation
September 2008
Registers
Registers
Input
Input
Used portions of the block
Unused portions of the block
Multiplier
Multiplier
Multiplier
Multiplier
18 × 18
18 × 18
18 × 18
18 × 18
Stratix II DSP Block
Only HCells that are required to implement the design’s DSP functions
are enabled. HCells not needed for DSP functions can be used for ALM
configurations, which results in efficient logic usage. In addition to area
management, the placement of these HCell macros allows for optimized
routing and performance.
An example of efficient logic area usage can be seen when comparing the
18 × 18 multiplier implementation in Stratix II FPGAs using the dedicated
DSP block versus the implementation in HardCopy II devices using
HCells. If the Stratix II DSP function only calls for one 18 × 18 multiplier,
the other three 18 × 18 multipliers and the DSP block’s adder output block
are not used
fabric that is not used for DSP functions can be used to implement other
combinational logic, adder, and register functions.
HardCopy II devices support all Stratix II DSP configurations (9 × 9,
18 × 18, and 36 × 36 multipliers) and all Stratix II DSP block features, such
as dynamic sign controls, dynamic addition/subtraction, saturation,
rounding, and dynamic input shift registers, except for dynamic mode
switching.
Accumulator
Subtractor/
Adder/
Block
(Figure
Registers
Registers
Output
Output
2–2). In HardCopy II devices, the HCell-based logic
Registers
Input
HardCopy II HCell-Based Logic Fabric
These elements are implemented
be used to perform other
Unused logic area can
using HCell macros.
logic functions.
Multiplier
18 × 18
Preliminary
Registers
Output
HCells
2–7