AT86RF230_09 ATMEL [ATMEL Corporation], AT86RF230_09 Datasheet - Page 40

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AT86RF230_09

Manufacturer Part Number
AT86RF230_09
Description
Low Power 2.4 GHz Transceiver for ZigBee, IEEE 802.15.4, 6LoWPAN, RF4CE and ISM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
40
AT86RF230
Bit
0x2C
Read/Write
Reset value
Bit
0x2C
Read/Write
Reset value
• Bit [7:5] – TRAC_STATUS
The status of the TX_ARET algorithm is indicated by register bits TRAC_STATUS.
Details of the algorithm and a description of the status information are given in section
7.2.3.2.
Table 7-8. State Control Register, Register Bits TRAC_STATUS TX_ARET
• Bit [4:0] – TRX_CMD
A write access to register bits TRX_CMD initiates a radio transceiver state transition
towards the new state.
Table 7-9. State Control Register, Register Bits TRX_CMD
Register 0x2C (XAH_CTRL)
The XAH_CTRL register controls the TX_ARET transaction in the Extended Operating
Mode of the radio transceiver.
Register Bits
TRAC_STATUS
Register Bits
TRX_CMD
Notes:
1. TRX_CMD = 0 after power-on reset (POR)
2. Frame transmission starts 16 µs (1 symbol) after TX_START
R/W
R/W
7
0
3
1
Value[7:5]
Value[4:0]
0x00
0x02
0x03
0x06
0x08
0x09
0x16
0x19
MAX_CSMA_RETRIES
0
1
3
5
7
(1)
(2)
MAX_FRAME_RETRIES
R/W
R/W
6
0
2
0
State Description
NOP
TX_START
FORCE_TRX_OFF
RX_ON
TRX_OFF (Clock State)
PLL_ON (TX_ON)
RX_AACK_ON
TX_ARET_ON
All other values are reserved
Description
SUCCESS
SUCCESS_DATA_PENDING
CHANNEL_ACCESS_FAILURE
NO_ACK
INVALID
All other values are reserved
R/W
R/W
5
1
1
0
Reserved
R/W
R/W
4
1
0
0
5131E-MCU Wireless-02/09
XAH_CTRL
XAH_CTRL

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