74ACT258SC Fairchild Semiconductor, 74ACT258SC Datasheet - Page 2

• Manufacturer Part Number: 74ACT258SC
• Description: IC MULTIPLEXER QUAD 2INP 16-SOIC
• Manufacturer: Fairchild Semiconductor
• Series: 74ACTr
• Type: Multiplexerr

Specifications of 74ACT258SC

• Circuit: 4 x 2:1
• Independent Circuits: 1
• Current - Output High, Low: 24mA, 24mA
• Voltage Supply Source: Single Supply
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Logical Function: Mux
• Configuration: 4 x 2:1
• Number Of Inputs: 8
• Number Of Outputs: 4
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: SOIC N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©1988 Fairchild Semiconductor Corporation
74ACT258 Rev. 1.4
Logic Symbol
Truth Table
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Output
Enable
OE
H
L
L
Select
Input
S
H
H
X
IEEE/IEC
I
X
X
X
0
Inputs
Data
I
H
X
L
1
Outputs
Z
H
Z
L
2
Functional Description
The ACT258 is a quad 2-input multiplexer with 3-STATE
outputs. It selects four bits of data from two sources
under control of a common Select input (S). When the
Select input is LOW, the I
when Select is HIGH, the I
data on the selected inputs appears at the outputs in
inverted form. The ACT258 is the logic implementation
of a 4-pole, 2-position switch where the position of the
switch is determined by the logic levels supplied to the
Select input. The logic equations for the outputs are
shown below:
When the Output Enable input (OE) is HIGH, the outputs
are forced to a high impedance state. If the outputs of
the 3-STATE devices are tied together, all but one
device must be in the high impedance state to avoid high
currents that would exceed the maximum ratings.
Designers should ensure that Output Enable signals to
3-STATE devices whose outputs are tied together are
designed so there is no overlap.
Z
Z
Z
Z
a
b
c
d
= OE • (I
= OE • (I
= OE • (I
= OE • (I
1a
1b
1c
1d
• S + I
• S + I
• S + I
• S + I
0x
1x
inputs are selected. The
inputs are selected and
0c
0a
0b
0d
• S)
• S)
• S)
• S)
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