M36L0R7050B0ZAQE STMICROELECTRONICS [STMicroelectronics], M36L0R7050B0ZAQE Datasheet
M36L0R7050B0ZAQE
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M36L0R7050B0ZAQE Summary of contents
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Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32 Mbit (2M x16) PSRAM, 1.8V Supply Multi-Chip Package FEATURES SUMMARY MULTI-CHIP PACKAGE – 1 die of 128 Mbit (8Mb x16, Multiple Bank, Multi-level, Burst) Flash Memory – 1 die of 32 ...
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M36L0R7050T0, M36L0R7050B0 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Table 4. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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M36L0R7050T0, M36L0R7050B0 SUMMARY DESCRIPTION The M36L0R7050T0 and M36L0R7050B0 com- bine two memory devices in a Multi-Chip Package: a 128-Mbit, Multiple Bank Flash memory, the M30L0R7000T0 or M30L0R7000B0, and a 32- Mbit PseudoSRAM, the M69AR048B. Recom- mended operating conditions do not ...
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Figure 3. TFBGA Connections (Top view through package ...
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M36L0R7050T0, M36L0R7050B0 SIGNAL DESCRIPTIONS See Figure 2., Logic Diagram Names, for a brief overview of the signals connect this device. Address Inputs (A0-A22). Addresses are common inputs for the Flash Memory and the PSRAM components. The other lines ...
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It is not allowed to set IL the same time. IH PSRAM Output Enable (G ). The Output En- P able provides a high speed tri-state control, P allowing fast read/write ...
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M36L0R7050T0, M36L0R7050B0 FUNCTIONAL DESCRIPTION The PSRAM and Flash memory components have separate power supplies but share the same grounds. They are distinguished by three Chip En- able inputs: E for the Flash memory and for the PSRAM. ...
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Table 2. Main Operating Modes Operation Flash Read Flash Write Flash Address Latch Flash Output V V ...
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M36L0R7050T0, M36L0R7050B0 FLASH MEMORY DEVICE The M36L0R7050T0 and M36L0R7050B0 contain a 128 Mbit Flash memory. For detailed information on how to use the devices, PSRAM DEVICE The M36L0R7050T0 and M36L0R7050B0 contain a 32 Mbit PSRAM. This device can be placed ...
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MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause per- manent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above ...
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M36L0R7050T0, M36L0R7050B0 DC AND AC PARAMETERS This section summarizes the operating measure- ment conditions, and the DC and AC characteris- tics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed ...
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Table 7. Flash Memory DC Characteristics - Currents Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO Supply Current Asynchronous Read (f=6MHz) Supply Current Synchronous Read (f=40MHz) I DD1 Supply Current Synchronous Read (f=54MHz) Supply Current I ...
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M36L0R7050T0, M36L0R7050B0 Table 8. Flash Memory DC Characteristics - Voltages Symbol Parameter V Input Low Voltage IL V Input High Voltage IH V Output Low Voltage OL V Output High Voltage Program Voltage-Logic PP1 PPF V V ...
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PACKAGE MECHANICAL Figure 7. Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch, Bottom View Outline BALL "A1" FE Note: Drawing is not to scale. Table 10. Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm ...
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M36L0R7050T0, M36L0R7050B0 PART NUMBERING Table 11. Ordering Information Scheme Example: Device Type M36 = Multi-Chip Package (Multiple Flash + RAM) Flash 1 Architecture L = Multilevel, Multiple Bank, Burst mode Flash 2 Architecture Die Operating Voltage R ...
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REVISION HISTORY Table 12. Document Revision History Date Version 29-Jul-2003 0.1 First Issue Package specifications updated. PSRAM component updated in accordance with M69AR048B datasheet. Flash memory component updated in accordance with 03-Jun-2004 0.2 M30L0R7000(T/B)0 datasheet. Document status changed from Target ...
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M36L0R7050T0, M36L0R7050B0 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from ...