HYS64T128920EU-2.5-B2 QIMONDA [Qimonda AG], HYS64T128920EU-2.5-B2 Datasheet - Page 31

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HYS64T128920EU-2.5-B2

Manufacturer Part Number
HYS64T128920EU-2.5-B2
Description
240-Pin unbuffered DDR2 SDRAM Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1) ODT turn on time min is when the device leaves high impedance and ODT resistance begins to turn on. ODT turn on time max is when the
2) ODT turn off time min. is when the device starts to turn off ODT resistance. ODT turn off time max is when the bus is in high impedance.
Rev. 1.0, 2006-10
10202006-L0SM-FEYT
Symbol
t
t
t
t
t
t
t
t
AOND
AON
AONPD
AOFD
AOF
AOFPD
ANPD
AXPD
ODT resistance is fully on. Both are measured from
(= 2 x 5 ns) after the clock edge that registered a first ODT HIGH if
Both are measured from
12.5 ns (= 2.5 x 5 ns) after the clock edge that registered a first ODT HIGH if
Parameter / Condition
ODT turn-on delay
ODT turn-on
ODT turn-on (Power-Down Modes)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down Modes)
ODT to Power Down Mode Entry Latency
ODT Power Down Exit Latency
t
AOFD
. Both are measured from
ODT AC Character. and Operating Conditions for DDR2-533 & DDR2-400
t
AOND
t
, which is interpreted differently per speed bin. For DDR2-400/533,
AOFD
, which is interpreted differently per speed bin. For DDR2-400/533,
Values
Min.
2
t
t
2.5
t
t
3
8
AC.MIN
AC.MIN
AC.MIN
AC.MIN
31
t
CK
= 5 ns.
+ 2 ns
+ 2 ns
HYS[64/72]T[32/64/128][0/9]xxEU-[25F/2.5/3/3S/3.7]-B2
t
CK
= 5 ns.
Max.
2
t
2
t
2.5
2.5
AC.MAX
AC.MAX
t
CK +
t
CK +
t
+ 1 ns
AC.MAX
+ 0.6 ns
t
Unbuffered DDR2 SDRAM Module
AC.MAX
+ 1 ns
+ 1 ns
Internet Data Sheet
Unit
t
ns
ns
t
ns
ns
t
t
CK
CK
CK
CK
TABLE 19
t
AOND
Note
1)
2)
t
is 10 ns
AOFD
is

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