HYS64T128920HU QIMONDA [Qimonda AG], HYS64T128920HU Datasheet - Page 6
![no-image](/images/no-image-200.jpg)
HYS64T128920HU
Manufacturer Part Number
HYS64T128920HU
Description
240-Pin Unbuffered DDR2 SDRAM Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1.HYS64T128920HU.pdf
(76 pages)
- Current page: 6 of 76
- Download datasheet (5Mb)
1) All product types end with a place code, designating the silicon die revision. Example: HYS64T64000HU–3–A, indicating Rev. “A” dies are
2) The Compliance Code is printed on the module label and describes the speed grade, for example “PC2–5300U–444–12–C1”, where
1) Green Product
2) For a detailed description of all functionalities of the DRAM components on these modules see the component data sheet.
Rev. 1.41, 2007-05
03292006-EZUJ-JY4S
Product Type
HYS64T128020HU–5–A
HYS72T128020HU–5–A
DIMM
Density
256 MByte
512 MByte
512 MByte
1 GByte
1 GByte
Product Type
HYS64T32000HU
HYS64T32900HU
HYS64T64000HU
HYS64T64900HU
HYS72T64000HU
HYS64T128020HU
HYS64T128920HU
HYS72T128020HU
used for DDR2 SDRAM components. For all Qimonda DDR2 module and component nomenclature see
4200U means Unbuffered DIMM modules with 4.26 GB/sec Module Bandwidth and “444-12” means Column Address Strobe (CAS)
latency = 4, Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest JEDEC SPD Revision 1.2 and
produced on the Raw Card “C”.
1)
1)
Module
Organization
32M ×64
64M ×64
64M ×72
128M ×64
128M ×72
DRAM Components
HYB18T512160AF
HYB18T512160AF
HYB18T512800AF
HYB18T512800AF
HYB18T512800AF
HYB18T512800AF
HYB18T512800AF
HYB18T512800AF
Compliance Code
1GB 2R×8 PC2–3200U–333–11–B1
1GB 2R×8 PC2–3200E–333–12–B1
Memory
Ranks
1
1
1
2
2
1)
2)
512 Mbit
512 Mbit
512 Mbit
512 Mbit
512 Mbit
512 Mbit
512 Mbit
512 Mbit
DRAM Density
ECC/
Non-ECC
Non-ECC
Non-ECC
ECC
Non-ECC
ECC
6
# of SDRAMs # of row/bank/column
4
8
9
16
18
HYS[64/72]T[32/64/128]xx0HU–[3/3S/3.7/5]–A
DRAM Organisation
32M × 16
32M × 16
64M × 8
64M × 8
64M × 8
64M × 8
64M × 8
64M × 8
Description
2 Ranks, Non-ECC
2 Ranks, ECC
Unbuffered DDR2 SDRAM Modules
bits
13/2/10
14/2/10
14/2/10
14/2/10
14/2/10
Components on Modules
Chapter 6
Internet Data Sheet
Notes
Address Format
of this data sheet.
SDRAM
Technology
512 Mbit (×8)
512 Mbit (×8)
TABLE 5
TABLE 6
2)
Raw
Card
C
A,D
A,F
B,E
B,G
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