PPC440GRX-NPAFFFTS AMCC [Applied Micro Circuits Corporation], PPC440GRX-NPAFFFTS Datasheet - Page 16
PPC440GRX-NPAFFFTS
Manufacturer Part Number
PPC440GRX-NPAFFFTS
Description
PowerPC 440GRx Embedded Processor
Manufacturer
AMCC [Applied Micro Circuits Corporation]
Datasheet
1.PPC440GRX-NPAFFFTS.pdf
(88 pages)
- Current page: 16 of 88
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440GRx – PPC440GRx Embedded Processor
General Purpose Timers (GPT)
Provides a separate time base counter and additional system timers in addition to those defined in the processor.
Features include:
General Purpose IO (GPIO) Controller
Universal Interrupt Controller (UIC)
Two Universal Interrupt Controllers (UIC) are employed. They provide control, status, and communications
necessary between the external and internal sources of interrupts and the on-chip PowerPC processor.
Note:
Features include:
JTAG
Features include:
16
• 32-bit Time Base Counter driven by the OPB bus clock
• Seven 32-bit compare timers
• Controller functions and GPIO registers are programmed and accessed via memory-mapped OPB bus master
• 64 GPIOs are multiplexed with other functions. DCRs control whether a particular pin that has GPIO
• Each GPIO output is separately programmable to emulate an open drain driver (that is, drives to zero,
• 10 external interrupts
• Edge triggered or level-sensitive
• Positive or negative active
• Non-critical or critical interrupt to the on-chip processor
• Programmable interrupt priority ordering
• Programmable critical interrupt vector for faster vector processing
• IEEE 1149.1 Test Access Port
• JTAG Boundary Scan Description Language (BSDL)
• Refer to http://www.amcc.com/Embedded/Partners for a list of AMCC partners supplying probes for use
accesses.
capabilities acts as a GPIO or is used for another purpose.
tri-stated if output bit is 1).
with this port.
Processor specific interrupts (for example, page faults) do not use UIC resources.
Revision 1.08 – October 15, 2007
Preliminary Data Sheet
AMCC Proprietary
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