PPC440GRX-NPAFFFTS AMCC [Applied Micro Circuits Corporation], PPC440GRX-NPAFFFTS Datasheet - Page 63
PPC440GRX-NPAFFFTS
Manufacturer Part Number
PPC440GRX-NPAFFFTS
Description
PowerPC 440GRx Embedded Processor
Manufacturer
AMCC [Applied Micro Circuits Corporation]
Datasheet
1.PPC440GRX-NPAFFFTS.pdf
(88 pages)
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Revision 1.08 – October 15, 2007
Table 9. Signal Functional Description (Sheet 8 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to OV
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to OV
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
AMCC Proprietary
Preliminary Data Sheet
Trace Interface
TrcBS0:2
TrcClk
TrcES0:4
TrcTS0:6
Power
V
OV
EOV
SOV
GND
AV
AGND
EAV
EAGND
Reserved
Reserved
DD
DD
DD
DD
DD
DD
Signal Name
Trace branch execution status.
Additional information on trace execution and branch status.
Ground for logic and I/O voltage.
Ground for system PLL voltage (analog).
Ground for Ethernet PLL voltage (analog).
Trace data capture clock, runs at 1/4 the frequency of the
processor.
Trace Execution Status is presented every fourth processor
clock cycle.
+1.5V—Logic voltage.
+3.3V—I/O (except DDR2 SDRAM and Ethernet).
+2.5V—I/O Ethernet.
+1.8V (DDR2) or +2.5V (DDR1)—I/O DDR SDRAM.
+1.5V—Filtered voltage for system PLLs (analog).
+1.5V—Filtered voltage for Ethernet PLLs (analog).
To avoid noise pickup, the balls on this chip classified as
Reserved must be connected as shown in Table 8 on
page 55.
DD
(EOV
Description
DD
DD
for Ethernet)
440GRx – PPC440GRx Embedded Processor
(EOV
DD
for Ethernet)
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
na/
I/O
I/O
I/O
I/O
O
3.3V tolerant
3.3V tolerant
3.3V tolerant
3.3V tolerant
2.5V CMOS
2.5V CMOS
2.5V CMOS
2.5V CMOS
Type
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
Notes
63
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