PPC440GRX-NPAFFFTS AMCC [Applied Micro Circuits Corporation], PPC440GRX-NPAFFFTS Datasheet - Page 61
PPC440GRX-NPAFFFTS
Manufacturer Part Number
PPC440GRX-NPAFFFTS
Description
PowerPC 440GRx Embedded Processor
Manufacturer
AMCC [Applied Micro Circuits Corporation]
Datasheet
1.PPC440GRX-NPAFFFTS.pdf
(88 pages)
- Current page: 61 of 88
- Download datasheet (2Mb)
Revision 1.08 – October 15, 2007
Table 9. Signal Functional Description (Sheet 6 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to OV
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to OV
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
AMCC Proprietary
Preliminary Data Sheet
NAND Flash Interface
NFALE
NFCE0:3
NFCLE
NFRdyBusy
NFREn
NFWEn
Serial Peripheral Interface
SCPClkOut
SCPDI
SCPDO
Interrupts Interface
IRQ0:4
IRQ5
IRQ6:9
JTAG Interface
TCK
TDI
TDO
TMS
TRST
Signal Name
Address Latch Enable.
Clock output.
Data input.
Data output.
External interrupt requests 0 through 4.
External interrupt request 5.
External interrupt requests 6 through 9.
Chip Enable (multiplexed with the PerCS0:3 signals).
Command Latch Enable.
Latches operational commands into the NAND Flash.
Ready/Busy.
Indicates status of device during program erase or page read.
This signal is wire-OR connected from all NAND Flash
devices.
Read Enable.
Data is latched on the rising edge.
Write Enable.
Data is latched on the rising edge.
Test Clock.
Test Data In.
Test Data Out.
Test Mode Select.
Test Reset.
DD
(EOV
Description
DD
DD
for Ethernet)
440GRx – PPC440GRx Embedded Processor
(EOV
DD
for Ethernet)
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
w/pull-up
w/pull-up
w/pull-up
w/pull-up
Type
Rcvr
Notes
1, 5
1, 4
1, 5
1
1
1
1
1
1
1
1
1
1
61
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