M54HC373D STMICROELECTRONICS [STMicroelectronics], M54HC373D Datasheet

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M54HC373D

Manufacturer Part Number
M54HC373D
Description
RAD-HARD OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
DESCRIPTION
The M54HC373 is an high speed CMOS OCTAL
LATCH WITH 3-STATE OUTPUTS fabricated
with sub-micron silicon gate C
This 8-BIT D-Type latches is controlled by a latch
enable input (LE) and output enable input (OE).
PIN CONNECTION
May 2004
HIGH SPEED:
t
LOW POWER DISSIPATION:
I
HIGH NOISE IMMUNITY:
V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
WIDE OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 373
SPACE GRADE-1: ESA SCC QUALIFIED
50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
DEVICE FULLY COMPLIANT WITH
SCC-9203-059
PD
CC
PLH
OH
NIH
CC
= 12ns (TYP.) at V
= 4 A(MAX.) at T
| = I
(OPR) = 2V to 6V
= V
t
PHL
OL
NIL
= 6mA (MIN)
= 28% V
CC
A
CC
=25°C
(MIN.)
= 6V
2
MOS technology.
WITH 3 STATE OUTPUT NON INVERTING
RAD-HARD OCTAL D-TYPE LATCH
ORDER CODES
While the LE input is held at a high level, the Q
outputs will follow the data input. When the LE is
taken low, the Q outputs will be latched at the logic
level of D input data.
While the OE input is at low level, the eight outputs
will be in a normal logic state (high or low logic
level) and when OE is in high level the outputs will
be in a high impedance state.
The 3-State output configuration and the wide
choice of outline make bus organized system
simple.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PACKAGE
DILC
FPC
DILC-20
M54HC373D
M54HC373K
FM
M54HC373
Rev. 1
FPC-20
M54HC373D1
M54HC373K1
EM
1/11

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M54HC373D Summary of contents

Page 1

... The 3-State output configuration and the wide choice of outline make bus organized system simple. 2 MOS technology. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M54HC373 DILC-20 FM DILC M54HC373D FPC M54HC373K Rev. 1 FPC-20 EM M54HC373D1 M54HC373K1 1/11 ...

Page 2

M54HC373 Figure 1: IEC Logic Symbols Figure 2: Input And Output Equivalent Circuit Table 2: Truth Table Don’t Care Z: High Impedance (*): Q Outputs are latched at the time when the LE input ...

Page 3

Figure 3: Logic Diagram Table 3: Absolute Maximum Ratings Symbol V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current ...

Page 4

M54HC373 Table 5: DC Specifications Symbol Parameter V High Level Input IH Voltage V Low Level Input IL Voltage V High Level Output OH Voltage V Low Level Output OL Voltage I Input Leakage I Current I High Impedance OZ ...

Page 5

Table 6: AC Electrical Characteristics (C Symbol Parameter t t Output Transition TLH THL Time t t Propagation Delay PLH PHL Time (LE High Impedance PZL PZH Output Enable Time t t High Impedance PLZ ...

Page 6

M54HC373 Figure 4: Test Circuit PLH PHL PZL PLZ PZH PHZ C = 50pF/150pF or equivalent (includes jig and probe capacitance equivalent ...

Page 7

Figure 6: Waveform - Output Enable And Disable Times (f=1MHz; 50% duty cycle) Figure 7: Waveform - Propagation Delay Times (f=1MHz; 50% duty cycle) M54HC373 7/11 ...

Page 8

M54HC373 DIM. MIN. A 2.1 a1 3.00 a2 0.63 B 1.93 b 0.40 b1 0.20 D 25. 22.73 e3 7. 11.30 L 1.14 8/11 DILC-20 MECHANICAL DATA mm. TYP MAX. 2.71 3.70 ...

Page 9

FPC-20 MECHANICAL DATA DIM. MIN. A 9.98 10.16 B 9.98 10.16 C 1.45 D 0.10 0.127 E 11.30 11. 0.38 H 7.24 L 24. 1.14 P 0.10 mm. TYP MAX. 10.34 0.393 10.34 0.393 ...

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M54HC373 Table 8: Revision History Date Revision 10-May-2004 1 10/11 Description of Changes First Release ...

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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. ...

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