HYB5116405BJBT-50- SIEMENS [Siemens Semiconductor Group], HYB5116405BJBT-50- Datasheet - Page 7
HYB5116405BJBT-50-
Manufacturer Part Number
HYB5116405BJBT-50-
Description
4M x 4-Bit Dynamic RAM 2k & 4k Refresh
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.HYB5116405BJBT-50-.pdf
(28 pages)
DC Characteristics( note : values in brackets for HYB 5117405 BJ/BT)
T
Parameter
Average
during hyper page mode:
(RAS =
Standby
(RAS = CAS =
Average
before-RAS refresh mode: -50 ns version
(RAS, CAS cycling: t
Average Self Refresh Current
(CBR cycle with tRAS>TRASSmin., CAS held low,
WE=Vcc-0.2V, Address and Din=Vcc - 0.2V or 0.2V)
Capacitance
T
Parameter
Input capacitance (A0 to A10,A11)
Input capacitance (RAS, CAS, WE, OE)
I/O capacitance (I/O1-I/O4)
Semiconductor Group
A
A
= 0 to 70 °C,
= 0 to 70 °C,
V
V
V
V
IL
CC
, CAS, address cycling:t
CC
CC
supply current,
supply current
supply current, during CAS-
V
V
V
CC
CC
SS
– 0.2 V)
= 5 V
= 0 V,
RC
= t
RC
V
10 %,
CC
-50 ns version
-60 ns version
-70 ns version
-60 ns version
-70 ns version
min.)
= 5 V
f
PC
= 1 MHz
= t
10 %; t
PC
min.)
T
= 2 ns
7
Symbol
I
I
I
I
CC4
CC5
CC6
CC7
Symbol
C
C
C
I1
I2
IO
HYB5116(7)405BJ/BT-50/-60/-70
min.
–
–
–
–
–
–
–
_
Limit Values
min.
–
–
–
Limit Values
max.
70 (70)
55 (55)
45 (45)
1
100(120)
90 (110)
80 (100)
1
4M x 4-EDO DRAM
max.
5
7
7
Unit Test
mA
mA
mA
mA
mA
mA
mA
mA
Condition
2) 3) 4)
2) 3) 4)
2) 3) 4)
1)
2) 4)
2) 4)
2) 4)
Unit
pF
pF
pF