R8A66171SP RENESAS [Renesas Technology Corp], R8A66171SP Datasheet - Page 3

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R8A66171SP

Manufacturer Part Number
R8A66171SP
Description
A2RT (ADVANCED ASYNCHRONOUS RECEIVER & TRANSMITTER)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
R8A66171DD/SP
OPERATION
The R8A66171 is interfaced to a system bus and provides all functions needed for data communication.
When using the R8A66171, it is necessary to program the initial setting, baud rate, character length, CRC,
parity, in accordance with the communication system. Once programmed, the communication system
functions are executed continuously.
When initial setting of R8A66171 is completed, data communication becomes possible. When the transmitter
is transmit-enabled (TXEN) by a command instruction and /CTS is low-level, data transfer starts up. If these
conditions are not satisfied, data transmission is not executed. Reception is possible when the receiver is
receive-enabled (RXEN) by a command instruction.
The MCU is able to read data when the interrupt output, /INT, goes low by packet end (PE) or buffer full (BF).
While receiving data, the R8A66171 checks for errors and provides status information. It checks for four
types of errors : CRC, parity, overrun and framing errors. When an error occurs, R8A66171 continues
operation. The error status is maintained until the error reset, (ER) is modified by a command instruction.
The access method of the R8A66171 is shown Table 1.
REJ03F269-0100 Rev.1.00 Feb.19.2008
Page 3 of 22
TABLE 1. Access method of the R8A66171
Note : X="L" or "H"
C/D
16
4
8
H
H
X
X
L
L
C/D
RD
H
H
H
X
L
L
A0
CS
WR
H
H
H
X
L
L
Fig.1 Interface between the R8A66171 and MCU system bus
Decoder
CS
D0~D7
H
L
L
L
L
L
R8A66171DD/SP
8
Data bus
Data bus
Data bus
Data bus
Data bus : High impedance
Data bus : High impedance
RD
I/OR
R8A66171 operation
Receiving data buffer(FIFO) Read receive data
Transmit data buffer(FIFO) Write transmit data
Status register
Command register
WR
I/OW
RESET
RESET
Read the status
Write the command
MPU operation
Control bus
Data bus
Address bus
-
-

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