H55S1G62MFP-75 HYNIX [Hynix Semiconductor], H55S1G62MFP-75 Datasheet
H55S1G62MFP-75
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H55S1G62MFP-75 Summary of contents
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MOBILE SDR SDRAMs based on 16M x 4Bank x16I/O 1Gb (64Mx16bit) Mobile SDRAM - Organized as 4banks of 16,777,216 x16 This document is a general product description and is subject to change without notice. Hynix does not assume any ...
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... Final Version 1.1 Modify : tRAS (166MHz/133Mhz: 42ns/45ns) 1.2 Modify some timing diagram Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory History C, Full Bank) : 450uA --> 500uA o 11 H55S1G62MFP Series Draft Date Remark Sep. 2007 Preliminary Jan. 2008 Preliminary Mar. 2008 Jun. 2008 Jul. 2008 2 ...
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... DESCRIPTION The Hynix H55S1G62MFP series is suited for non-PC application which use the batteries such as PDAs, 2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, handheld PCs. The Hynix 1G Mobile SDRAM is 1,073,741,824-bit CMOS Mobile Synchronous DRAM(Mobile SDR), ideally suited for the main memory applications which requires large memory density and high bandwidth ...
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... PCs, and many other portable digital applications. Hynix Mobile DRAM will be able to containue its constant effort of enabling the Advanced package products of all appli- cation customers. - Please Contact Hynix Office for Hynix KGD product availability and informations. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series 11 4 ...
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... Deep Power Down Mode Operation Temperature ● Package ● Ball Lead Free FBGA 1Gb SDRAM ORDERING INFORMATION Part Number H55S1G62MFP-60 H55S1G62MFP-75 H55S1G62MFP-A3 Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory CAS Clock Frequency Latency 166MHz 3 133MHz 3 105MHz 3 H55S1G62MFP Series ...
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... VD DQ VSSQ C VSSQ VDD VSSQ E A13 VSS F CLK CKE /CAS G A11 < Top V iew > H55S1G62MFP Series VDD VDD LDQ /RAS /W E BA0 BA1 /CS ...
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... Command Inputs : RAS, CAS and WE define the operation Refer function truth table for details Data Mask : Controls output buffers in read mode and masks input data in write mode Data Input/Output : Multiplexed data input/output pin Power supply for internal circuits Power supply for output buffers No connection H55S1G62MFP Series DESCRIPTION 11 7 ...
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... Mobile SDR Memory Symbol TSTG VIN, VOUT VDD VDDQ IOS - Symbol Min VDD 1.7 VDDQ 1.7 VIH 0.8*VDDQ VIL -0 - H55S1G62MFP Series Rating TA - -55 ~ 150 -0.3 ~ VDDQ+0.3 -0.3 ~ 2.7 -0 Typ Max Unit 1.8 1.95 V 1.8 1. VDDQ+0 0.2*VDDQ V 1.8V 0V ...
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... Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory Pin CLK A0~A13, BA0, BA1, CKE, CS, RAS, CAS, WE, UDQM, LDQM DQ0 ~ DQ15 ( Symbol Min -1 0.9*V OH DDQ H55S1G62MFP Series A3/75/60 Symbol Min Max CI1 1.5 3.5 CI2 1.5 3.0 CI/O 2.0 4.5 Max Unit 0.1*V V DDQ 11 Unit ...
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... CK Input signals are stable. t ≥ t (min), I =0mA All banks active t ≥ t (min), RFC RFC CKE ≤ 0.2V See the page for “Deep Power Down Mode” H55S1G62MFP Series Speed 166MHz 133MHz 105MHz 50 40 0.4 0 120 See Next Page ...
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... With a on-chip temperature sensor of Mobile memory, auto temperature compensated self refresh will automatically adjust the interval of self-refresh operation according to ambient temperature variations. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory - Low Power (I ) DD6 Memory Array 2 Banks 350 650 o C are examples for reference sample value only. 11 H55S1G62MFP Series Unit 1 Bank uA 300 uA 500 11 ...
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... CHW t 2.0 CLW t 2.0 AC3 t - AC2 2.0 CKS t 1.0 CKH 1.0 OLZ t OHZ3 t OHZ2 & t > 1ns, then [( Output H55S1G62MFP Series 133MHz 105MHz Max Min Max Min Max 1000 7.5 1000 9.5 1000 1000 12 1000 15 1000 - 2 2.5 - 3.0 - 5.4 - 6.0 - 7.0 6 2 2 ...
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... RRD t 110 RFC t 1 CCD t 0 WTL t 2 DPL t DAL t 2 DQZ t 0 DQM t 2 MRD t 3 PROZ3 t 2 PROZ2 1CLK t + DPE tCKS t 120 XSR t - REF H55S1G62MFP Series 133MHz 105MHz Max Min Max Min Max - 72 22.5 - 28.5 - 100K 45 100K 60 100K - 22 110 - 110 - - 1 - ...
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... ter ress B u rst R eg iste ter ten ister H55S1G62MFP Series ell A rra eco d ers tro l ...
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... Reserved Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory A10 Code 0 0 Burst Length H55S1G62MFP Series CAS Latency BT Burst Length Burst Type A3 Burst Type 0 Sequential 1 Interleave Burst Length ...
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... Quarter of Total Bank (BA1=BA0=0 or Bank Reserved Reserved Half of Bank 0(Bank 0 and Row Address MSB= Quarter of Bank 0(Bank 0 and Row Address 2 MSBs= Reserved 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series PASR 16 ...
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... H55S1G62MFP Series A10 WE DQM ADDR / Code Code Row Address L H Column Column H L ...
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... Precharge BA Row Add. Bank Activate Col Add. BA Write/WriteAP A10 Col Add. BA Read/ReadAP A10 Operation 11 H55S1G62MFP Series Action Notes Set the Mode Register 14 Start Auto or Self Refresh 5 No Operation Activate the specified bank and row ILLEGAL 4 ILLEGAL 4 No Operation 3 No Operation or Power ...
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... Precharge BA Row Add. Bank Activate BA Col Add. A10 Write/WriteAP BA Col Add. A10 Read/ReadAP Operation X X Device Deselect 11 H55S1G62MFP Series Action Notes Continue the Burst ILLEGAL 13,14 13 Termination Burst: Start 10 the Precharge ILLEGAL 4 Termination Burst: Start 8 Write(optional AP) Termination Burst: Start 8,9 Read(optional AP) ...
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... X X Auto or Self Refresh ILLEGAL BA X Precharge BA Row Add. Bank Activate BA Col Add. A10 Write/WriteAP BA Col Add. A10 Read/ReadAP Operation 11 H55S1G62MFP Series Action Notes ILLEGAL 13, Operation: Bank(s) idle after t RP ILLEGAL 4,12 ILLEGAL 4,12 ILLEGAL 4,12 No Operation: Bank(s) idle after Operation: ...
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... Auto or Self Refresh ILLEGAL BA X Precharge BA Row Add. Bank Activate BA Col Add. A10 Write/WriteAP BA Col Add. A10 Read/ReadAP Operation X X Device Deselect 11 H55S1G62MFP Series Action Notes No Operation: Row Active after t DPL ILLEGAL 13,14 13 ILLEGAL 4,13 ILLEGAL 4,12 ILLEGAL 4,12 ILLEGAL 4,9,12 No Operation: Precharge after t DPL ...
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... Illegal if tRRD is not satisfied 12. Illegal for single bank, but legal for other banks in multi-bank devices. 13. Illegal for all banks. 14. Mode Register Set and Extended Mode Register Set is same command truth table except BA1. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series 11 22 ...
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... H55S1G62MFP Series max A - Action A0 X INVALID Exit Self Refresh with X Device Deselect Exit Self Refresh with X No Operation X ILLEGAL X ILLEGAL X ILLEGAL X Maintain Self Refresh X INVALID X Power Down mode exit, ...
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... H55S1G62MFP Series max Action Refer to the idle State section of the Current State Truth Table X Auto Refresh Mode Register Set Refer to the idle State section of the Current State Truth Table X Entry Self Refresh ...
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... IDLE Refresh REFX Power Down Active Power Down WRITE with AP Write ROW WRITE ACTIVE Precharge All H55S1G62MFP Series ACT : Active DPDS : Enter Deep Power-Down DPDSX : Exit Deep Power- DownEMRS EMRS : Ext. Mode Reg. Set MRS : Mode Register Set PRE : Precharge PREALL : ...
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... CLK CKE (High) CS RAS CAS WE A0~A13 BA0,1 NOP command Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory CLK CKE (High) CS RAS CAS WE A0~A13 Row Address BA0,1 Bank Address Don't Care ACTIVATING A SPECIFIC ROW IN A SPECIFIC BANK 11 H55S1G62MFP Series RA BA Don't Care 26 ...
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... isa rite READ / WRITE COMMAND 11 H55S1G62MFP Series tio n 27 ...
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... REA Command NOP D DQ Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory NOP tOH tLZ Do0 Do1 tAC NOP NOP tOH tLZ Do0 tAC Read Burst Showing CAS Latency H55S1G62MFP Series Do2 Do3 Do1 Do2 Do3 Undefined Don't Care 11 28 ...
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... CLK Command READ BA, Col Address Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory READ’ NOP BA, Col Consecutive Read Bursts H55S1G62MFP Series NOP Don't Care ...
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... Mobile SDR Memory Non-Consective Read Bursts READ READ BA, Col BA, Col Randum Read Bursts H55S1G62MFP Series READ BA, Col Don't Care READ BA, Col ...
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... Data out from column BA, Col = Bank A, Colum Cases shown are bursts full page term inated after 2 data elem ents Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory BURST Terminating a Read Burst 11 H55S1G62MFP Series Don't Care 31 ...
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... However, DQM must be set High so that the output buffer becomes High-Z before data input. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory BURST Read to Write H55S1G62MFP Series W RITE BA, Col ...
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... Note that Precharge m ay not be issued before tRAS ns after the ACTIVE com m and for applicable banks. 3) The ACTIVE com m and applied if tRC has been m et. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory PRE Bank A, All READ to PRECHARGE 11 H55S1G62MFP Series ACT tRP BA, Row D on't Care 33 ...
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... In the case of burst write, the second write command has priority. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory Write Burst Operation H55S1G62MFP Series Don't Care ...
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... Concatenated Write Bursts W RITE W RITE BA, Col BA, Col x’ Random Write Cycles 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series RITE W RITE BA, Col BA, Col a g n’ a’ ...
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... Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory READ BA, Col H55S1G62MFP Series ...
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... Rev 1.2 / Jul. 2008 tDPL Non-Interrupting Write to Precharge period are written to the internal array, and any subsequent DPL PRE tDPL Interrupting Write to Precharge 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series PRE ...
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... Note the BURST TERMINATE command is not bank specific. This command should not be used to terminate write bursts. CLK CKE CS RAS CAS WE A0~A13 BA0, 1 Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory (High) BURST TERMINATE COMMAND 11 H55S1G62MFP Series Don't Care 38 ...
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... The user must not issue another command to the same bank until the precharge time (t Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory (High) BA Bank Address PRECHARGE command H55S1G62MFP Series A10 defines the precharge mode when a precharge command, a read command or a write command is issued. If A10 = High when a ...
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... Compensated Self Refresh) to reduce self refresh current and select the memory array to be refreshed by the value of PASR(Partial Array Self Refresh). The Mobile SDRAM can reduce the self refresh current(I two modes. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series . REF using these ...
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... Self Refresh Entry Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory CLK CKE CS RAS CAS WE A0~A13 Don't Care BA0, 1 CKEn CS RAS CAS H55S1G62MFP Series SELF REFRESH ENTRY COMMAND WE DQM ADDR A10/ Don't Care ...
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... Code = Mode Register / Extended Mode Register selection Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory (H igh ) Code Code MODE REGISTER SET COMMAND MRS NOP tMRD Code (BA0, BA1) and op-code (A0 - An) t DEFINITION MRD 11 H55S1G62MFP Series is met. MRD are Valid Valid Don't Care 42 ...
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... After 200 us a complete re-initialization routing is required defined for the initialization sequence. CLK CKE CS RAS CAS WE A0~A13 BA0, 1 POWER-DOWN COMMAND Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory CLK CKE CS RAS CAS WE A0~A13 BA0, 1 Don't Care DEEP POWER-DOWN COMMAND 11 H55S1G62MFP Series DEEP POWER-DOWN Don't Care 43 ...
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... Pre-charge all Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory Input buffers gated off Exit power-down mode. tCKS NOP Input buffers gated off Deep Power down entry H55S1G62MFP Series NOP ACTIVE DON’T CARE tCKS NOP APCG (min) 200us Deep Power down Exit DON’ ...
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... Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory t CKS t t CKS CKS Power down Exit Time Ra Ra Row Active Precharge Active Active Power down Power down Power down Exit Entry Exit H55S1G62MFP Series Ca Qa0 Qa1 Qa2 Read Precharge Don’t care 11 45 ...
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... Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory tCH tCL tCKS tRAS(MIN) AUTO NOP REFRESH tRP Enter self refresh mode H55S1G62MFP Series or COMMAND NOP Any COM INHIBIT tXSR Exit self refresh mode (Restart refresh time base) DON’T CARE 11 46 ...
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... If Auto Precharge is selected the row being accessed will be precharged at the end of the WRITE burst; if Auto Pre- charge is not selected, the row will remain active for subsequent accesses. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory and V (simultaneously). The clock signal must be started at the same time. DD DDQ 11 H55S1G62MFP Series 47 ...
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... rite Data M asking ata M askin g H55S1G62MFP Series time is met after the RP Data M asking 0 Latency IN2 ata M askin g 2 Laten ...
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... Internal CLK DQ Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory Clock Suspend Mode Clock Suspend Mode H55S1G62MFP Series Masked by CKE Frozen Int. CLK by CKE (CKE = Fixed Low Masked by CKE Frozen Int. CLK by CKE (CKE = Fixed Low ...
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... The Deep Power Down Mode is used to achieve maximum power reduction by cutting the power of the whole memory array of the devices. For more information, see the special operation for Low Power consumption of this data sheet. Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory H55S1G62MFP Series refresh in Conventional DRAMs using these two DD6 ...
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... CKE is low. The following diagram illustrates deep power down mode entry. CKE CS RAS CAS WE Pre-charge if needed Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory CKE CKE CS n tRP Deep Power Down Entry 11 H55S1G62MFP Series RAS CAS ...
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... The following timing diagram illustrates deep power down mode exit sequence. CLK CKE CS RAS CAS WE 200us Deep Power Down All Banks Exit Precharge Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory tRP Auto Auto Refresh Refresh H55S1G62MFP Series tRC Extended Mode Mode Register Set Register Set 11 New Command Accepted Here 52 ...
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... PACKAGE INFORMATION 54 Ball 0.8mm pitch 8mm x 12mm FBGA Rev 1.2 / Jul. 2008 1Gbit (64Mx16bit) Mobile SDR Memory 8.00 Typ. 3.20 1.60 Bottom View 1.375 0.80 Typ. H55S1G62MFP Series A1 INDEX MARK 0.8 Unit +/-0.01 [mm] 0.80 Typ. +/- 0.05 +/- 0.05 2.8 +/-0.01 1.00 max 11 0.45 0.34 53 ...