MACH111-14 AMD [Advanced Micro Devices], MACH111-14 Datasheet - Page 20

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MACH111-14

Manufacturer Part Number
MACH111-14
Description
High-Performance EE CMOS Programmable Logic
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
f
The parameter f
Because the flexibility inherent in programmable logic devices offers a choice of clocked
flip-flop designs, f
The first type of design is a state machine with feedback signals sent off-chip. This external
feedback could go back to the device inputs, or to a second device in a multi-chip state machine.
The slowest path defining the period is the sum of the clock-to-output time and the input setup
time for the external signals (t
external feedback or in conjunction with an equivalent speed device. This f
“f
The second type of design is a single-chip state machine with internal feedback only. In this
case, flip-flop inputs are defined by the device inputs and flip-flop outputs. Under these
conditions, the period is limited by the internal delay from the flip-flop outputs through the
internal feedback and logic to the flip-flop inputs. This f
simple internal counter is a good example of this type of design; therefore, this parameter is
sometimes called “f
The third type of design is a simple data path application. In this case, input data is presented to the
flip-flop and clocked through; no feedback is employed. Under these conditions, the period is limited
by the sum of the data setup time and the data hold time (t
of each f
determines the period for the third f
internal are calculated from other measured AC parameters. f
20
MAX
MAX
external.”
PARAMETERS
MAX
type is the minimum clock period (t
LOGIC
f
t
MAX
MAX
S
MAX
External 1/(t
CNT.
is the maximum clock rate at which the device is guaranteed to operate.
is specified for three types of synchronous designs.
REGISTER
s
+ t
CLK
f
S
MAX
CO
+ t
t
CO
)
No Feedback; 1/(t
MAX
CO
LOGIC
). The reciprocal, f
MACH111-5/7/10/12/15
, designated “f
t
S
(SECOND
t
CHIP)
S
WH
s
+ t
REGISTER
H
+ t
) or 1/(t
MAX
CLK
WL
S
). Usually, this minimum clock period
+ t
no feedback.” All frequencies except f
MAX
WH
MAX
MAX
H
+ t
). However, a lower limit for the period
LOGIC
, is the maximum frequency with
WL
is designated “f
internal is measured directly.
f
MAX
)
Internal (f
REGISTER
CNT
CLK
)
MAX
MAX
is designated
internal”. A
20420B-14
MAX

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