K9K1208Q0C Samsung semiconductor, K9K1208Q0C Datasheet - Page 11

• Manufacturer Part Number: K9K1208Q0C
• Description: 64M x 8 Bit / 32M x 16 Bit NAND Flash Memory
• Manufacturer: Samsung semiconductor

VALID BLOCK
NOTE :
1. The
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block, does not require Error Correction up to 1K program/erase
3. Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb memory space.
AC TEST CONDITION
(K9K12XXX0C-GCB0,JCB0 :TA=0 to 70°C, K9K12XXX0C-GIB0,JCB0 :TA=-40 to 85°C
CAPACITANCE
NOTE : Capacitance is periodically sampled and not 100% tested.
MODE SELECTION
NOTE : 1. X can be V
K9K1208Q0C
K9K1208D0C
K9K1208U0C
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
K9K12XXQ0C:Output Load (Vcc
K9K12XXD0C:Output Load (Vcc
K9K12XXU0C:Output Load (Vcc
K9K12XXU0C:Output Load (Vcc
K9K12XXQ0C : Vcc=1.70V~1.95V , K9K12XXD0C : Vcc=2.4V~2.9V , K9K12XXU0C : Vcc=2.7V~3.6V unless otherwise noted)
Valid Block Number
Input/Output Capacitance
Input Capacitance
sented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits
factory-marked bad blocks. Refer to the attached technical notes for a appropriate management of invalid blocks.
cycles.
CLE
H
H
X
X
X
X
X
L
L
L
L
device
2. WP should be biased to CMOS high or CMOS low for standby.
Parameter
ALE
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid blocks is pre-
X
H
H
X
X
X
X
L
L
L
L
Item
(1)
IL
Parameter
or V
(
T
CE
A
IH.
X
X
X
X
H
L
L
L
L
L
L
=25°C, V
K9K1216Q0C
K9K1216D0C
K9K1216U0C
Q
Q
Q
Q
WE
:1.8V +/-10%)
:2.65V +/-10%)
:3.0V +/-10%)
:3.3V +/-10%)
H
X
X
X
X
X
CC
=1.8V/2.65V/3.3V, f=1.0MHz)
Symbol
Symbol
C
N
C
VB
I/O
RE
IN
H
H
H
H
H
H
X
X
X
X
1 TTL GATE and CL=30pF 1 TTL GATE and CL=30pF 1 TTL GATE and CL=50pF
LOCKPRE
0V/V
K9K12XXQ0C
Test Condition
X
X
X
X
X
X
X
X
X
X
0V to Vcc
CC
Vcc
V
V
(2
4026
5ns
IN
Min
IL
-
=0V
Q
=0V
/2
11
0V/V
Q
WP
X
X
H
H
H
X
X
H
H
L
CC
(2)
Data Input
Data Output
During Read(Busy) on the devices
During Program(Busy)
During Erase(Busy)
Write Protect
Stand-by
Read Mode
Write Mode
Typ.
Min
-
K9K12XXD0C
-
-
0V to Vcc
Vcc
5ns
-
Q
/2
Command Input
Address Input(4clock)
Command Input
Address Input(4clock)
Q
FLASH MEMORY
4096
Max
Max
Mode
20
20
1 TTL GATE and CL=100pF
.
Do not erase or program
K9K12XXU0C
0.4V to 2.4V
1.5V
5ns
Blocks
Unit
Unit
pF
pF