K9K1G08U0M-YIB0 Samsung semiconductor, K9K1G08U0M-YIB0 Datasheet - Page 14
K9K1G08U0M-YIB0
Manufacturer Part Number
K9K1G08U0M-YIB0
Description
128M x 8 Bit NAND Flash Memory
Manufacturer
Samsung semiconductor
Datasheet
1.K9K1G08U0M-YIB0.pdf
(37 pages)
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System Interface Using CE don’t-care.
For an easier system interface, CE may be inactive during the data-loading or sequential data-reading as shown below. The internal
528byte page registers are utilized as separate buffers for this operation and the system design gets more flexible. In addition, for
voice or audio applications which use slow cycle time on the order of u-seconds, de-activating CE during the data-loading and read-
ing would provide significant savings in power consumption.
Figure 6. Program Operation with CE don’t-care.
I/O
K9K1G08U0M-YCB0, K9K1G08U0M-YIB0
CLE
CE
WE
ALE
Figure 7. Read Operation with CE don’t-care.
I/O
CE
WE
CLE
ALE
R/B
CE
WE
RE
0
0
~
~
7
7
t
CS
00h
80h
Start Add.(4Cycle)
Start Add.(4Cycle)
t
WP
t
CH
Must be held
low during tR.
t
R
Data Input
14
I/O
CE
RE
0
~
7
CE don’t-care
t
CE don’t-care
Data Output(sequential)
CEA
t
REA
FLASH MEMORY
Data Input
out
10h
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