LS7166_06 LSI [LSI Computer Systems], LS7166_06 Datasheet - Page 6
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LS7166_06
Manufacturer Part Number
LS7166_06
Description
24-BIT QUADRATURE COUNTER
Manufacturer
LSI [LSI Computer Systems]
Datasheet
1.LS7166_06.pdf
(15 pages)
7166-011705-6
TRANSIENT CHARACTERISTICS (See Timing Diagrams in Fig. 2 thru Fig. 7,
Clock A/B "Low”
Clock A/B "High"
Clock A/B Frequency
(See NOTE 1)
Clock UP/DN Reversal
Delay
LCTR Positive edge to
the next A/B positive or
negative edge delay
Clock A/B to
CY/BW/COMP "low"
propagation delay
Clock A/B to
CY/BW/COMP "high"
propagation delay
LCTR and LLTC pulse
width
Clock A/B to CYT, BWT
and COMPT "high"
propagation delay
Clock A/B to CYT, BWT
and COMPT "low"
progagation delay
WR pulse width
RD to data out delay
(C
CS, RD Terminate to
Data-Bus Tri-State
Data-Bus set-up
time for WR
Data-Bus hold time for WR
CS set-up time for RD
CS hold time for RD
Back to Back RD delay
RD to WR delay
C/D set-up time for RD
C/D hold time for RD
C/D set-up time for WR
C/D hold time for WR
CS set-up time for WR
CS hold time for WR
Back to Back WR delay
WR to RD delay
Quadrature Mode:
Clock A/B Validation delay
(See NOTE 1)
A and B phase delay
Clock A/B frequency
CY, BW, COMP pulse width
NOTE 1: In quadrature mode A/B inputs are filtered and required to be stable
V
DD
L
=20pF)
Parameter
= 3V to 5.5V, T
for at least T
A
= 0˚ to 85˚C, unless otherwise specified)
CQV
length to be valid.
Symbol
T
T
T
T
fc
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Tww
T
T
T
f
CRH
-
CRS
-
CQ
CL
CH
UDD
LC
CBL
CBH
LCW
TFH
TFL
WR
R
RT
DS
DH
SRS
SRH
RR
CWS
CWH
SWS
SWH
CQV
PH
CBW
Min.Value
100
100
208
30
18
22
60
60
60
30
30
60
30
30
60
60
60
-
-
-
-
85
0
0
0
-
-
0
0
-
-
Max.Value
100
100
110
160
200
No Limit
No Limit
1.2
-
-
65
85
-
-
30
-
-
-
-
-
-
-
-
-
-
-
-
-
25
Unit
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ns