HY57V281620ALT-6 HYNIX [Hynix Semiconductor], HY57V281620ALT-6 Datasheet - Page 12

• Manufacturer Part Number: HY57V281620ALT-6
• Description: 4 Banks x 2M x 16bits Synchronous DRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

COMMAND TRUTH TABLE
Note :
1. Exiting Self Refresh occurs by asynchronously bringing CKE from low to high
2. X = Don t care, H = Logic High, L = Logic Low. BA =Bank Address, RA = Row Address, CA = Column Address,
3. The burst read sigle write mode is entered by programming the write burst mode bit (A9) in the mode register to a logic 1.
Rev. 1.3/Aug. 01
Opcode = Operand Code, NOP = No Operation
Mode Register Set
No Operation
Bank Active
Read
Read with Autoprecharge
Write
Write with Autoprecharge
Precharge All Banks
Precharge selected Bank
Burst Stop
DQM
Auto Refresh
Burst-Read-Single-
WRITE
Self Refresh
Precharge
power down
Clock
Suspend
Command
1
Entry
Entry
Entry
Exit
Exit
Exit
CKEn-1
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
CKEn
X
X
X
X
X
X
X
H
X
H
H
H
L
L
L
CS
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS
X
X
H
H
H
H
X
H
X
H
X
H
X
V
L
L
L
L
L
L
X
CAS
H
H
H
H
H
H
H
L
X
L
L
L
L
L
X
X
X
X
V
WE
X
H
H
H
H
H
X
H
X
H
X
H
X
V
L
L
L
L
L
DQM
X
X
X
X
X
X
X
V
X
X
X
X
X
X
X
X
ADDR
CA
CA
(Other Pins OP code)
X
RA
A9 Pin High
OP code
A10/
AP
H
H
H
X
L
L
L
X
X
X
X
X
X
HY57V281620A
BA
V
V
V
X
V
Note
Mode
MRS
13