MX29LV640D MCNIX [Macronix International], MX29LV640D Datasheet
MX29LV640D
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MX29LV640D Summary of contents
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... Provides a hardware method of detecting program and erase operation completion • Hardware Reset (RESET#) Input - Provides a hardware method to reset the internal state machine to read mode • WP#/ACC input pin - Provides accelerated program capability P/N:PM1208 MX29LV640D T/B 64M-BIT [8M x 8/4M x 16] SINGLE VOLTAGE 3V ONLY FLASH MEMORY 1 REV. 1.6, AUG. 16, 2008 ...
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... BY# ACC A7 2 A17 P/N:PM1208 MX29LV640D T/B 48 TSOP A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 9 A20 10 WE# 11 RESET# 12 MX29LV640D T/B A21 13 WP#/ACC 14 RY/BY# 15 A18 16 A17 Q15/ A14 A15 A16 BYTE# ...
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... OE# Output Enable Input RESET# Hardware Reset Pin, Active Low BYTE# Word/Byte Selection Input WP#/ACC Hardware Write Protect/Programming Acceleration Input RY/BY# Read/Busy Output VCC +3.0V single power supply GND Device Ground P/N:PM1208 MX29LV640D T/B LOGIC SYMBOL 22 A0-A21 Q0-Q15 (A-1) CE# OE# WE# RESET# RY/BY# WP#/ACC BYTE REV. 1.6, AUG. 16, 2008 ...
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... BLOCK DIAGRAM CE# OE# CONTROL WE# INPUT RESET# LOGIC BYTE# WP#/ACC ADDRESS LATCH A0-AM AND BUFFER Q0-Q15/A-1 AM: MSB address P/N:PM1208 MX29LV640D T/B PROGRAM/ERASE HIGH VOLTAGE FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 4 WRITE STATE MACHINE (WSM) STATE REGISTER ...
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... Table 1. BLOCK STRUCTURE MX29LV640DT SECTOR GROUP ARCHITECTURE Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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... P/N:PM1208 MX29LV640D T/B Sector Sector Address A21-A12 Byte Mode (x8) SA40 0101000xxx 280000h-28FFFFh SA41 0101001xxx 290000h-29FFFFh SA42 0101010xxx 2A0000h-2AFFFFh SA43 0101011xxx 2B0000h-2BFFFFh SA44 0101100xxx 2C0000h-2CFFFFh SA45 0101101xxx 2D0000h-2DFFFFh SA46 0101110xxx 2E0000h-2EFFFFh ...
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... P/N:PM1208 MX29LV640D T/B Sector Sector Address A21-A12 Byte Mode (x8) SA80 1010000xxx 500000h-50FFFFh SA81 1010001xxx 510000h-51FFFFh SA82 1010010xxx 520000h-52FFFFh SA83 1010011xxx 530000h-53FFFFh SA84 1010100xxx 540000h-54FFFFh SA85 1010101xxx 550000h-55FFFFh SA86 1010110xxx 560000h-56FFFFh ...
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... Top Boot Security Sector Addresses Sector Size Byte Mode Word Mode (bytes) (words) 256 128 P/N:PM1208 MX29LV640D T/B Sector Sector Address A21-A12 Byte Mode (x8) SA120 1111000xxx 780000h-78FFFFh SA121 1111001xxx 790000h-79FFFFh SA122 1111010xxx 7A0000h-7AFFFFh SA123 1111011xxx 7B0000h-7BFFFFh SA124 1111100xxx ...
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... MX29LV640DB SECTOR GROUP ARCHITECTURE Sector Sector Size Group Byte Mode Word Mode (Kbytes) (Kwords ...
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... P/N:PM1208 MX29LV640D T/B Sector Sector Address A21-A12 Byte Mode (x8) SA39 0100000xxx 200000h-20FFFFh SA40 0100001xxx 210000h-21FFFFh SA41 0100010xxx 220000h-22FFFFh SA42 0100011xxx 230000h-23FFFFh SA43 0100100xxx 240000h-24FFFFh SA44 0100101xxx 250000h-25FFFFh SA45 0100110xxx 260000h-26FFFFh ...
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... P/N:PM1208 MX29LV640D T/B Sector Sector Address A21-A12 Byte Mode (x8) SA79 1001000xxx 480000h-48FFFFh SA80 1001001xxx 490000h-49FFFFh SA81 1001010xxx 4A0000h-4AFFFFh SA82 1001011xxx 4B0000h-4BFFFFh SA83 1001100xxx 4C0000h-4CFFFFh SA84 1001101xxx 4D0000h-4DFFFFh SA85 1001110xxx 4E0000h-4EFFFFh ...
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... Bottom Boot Security Sector Addresses Sector Size Byte Mode Word Mode (bytes) (words) 256 128 P/N:PM1208 MX29LV640D T/B Sector Sector Address A21-A12 Byte Mode (x8) SA119 1110000xxx 700000h-70FFFFh SA120 1110001xxx 710000h-71FFFFh SA121 1110010xxx 720000h-72FFFFh SA122 1110011xxx 730000h-73FFFFh SA123 1110100xxx ...
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... Q0~Q15 are input (DIN) or output (DOUT) pins according to the requests of command sequence, sector protection, or data polling algorithm Word Mode (Byte#=Vih), the addresses are AM to A0. In Byte Mode (Byte#=Vil), the addresses are AM to A-1 (Q15). 6. AM: MSB of address. P/N:PM1208 MX29LV640D T/B WE# OE# Address Data (I/O) ...
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... Sector unprotected code:00h. Sector protected code:01h. 2. Factory locked code: WP# protects bottom two address sector: 88h. WP# protects top two address sector: 98h Factory unlocked code: WP# protects bottom two address sector: 08h. WP# protects top two address sector: 18h 3. AM: MSB of address. P/N:PM1208 MX29LV640D T/B AM A11 ...
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... The accelerated program can improve programming performance compared with word/byte program. By applying Vhv on WP#/ACC pin, the device will enter accelerated program and draw current no more than Icp1 from WP#/ACC pin. Removing the Vhv from WP#/ACC pin will put the device back to normal operation (not accelerated). P/N:PM1208 MX29LV640D T/B 15 REV. 1.6, AUG. 16, 2008 ...
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... SECTOR GROUP PROTECT OPERATION When a sector group is protected, program or erase operation will be disabled on these sectors. MX29LV640D T/B provides two methods for sector group protection. Once the sector group is protected, the sector group remains protected until next chip unprotect temporarily unprotected by asserting RESET# pin at Vhv ...
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... When ViL is asserted on WP#/ACC pin, the two boot sectors are protected regardless of the previous state of protec- tion implemented by aforementioned Sector Group Protect/Chip Unprotect. For MX29LV640DT, the two outermost sectors are the two boot sectors of the highest addresses. For MX29LV640DB, the two outermost sectors are the two boot sectors of the lowest addresses. ...
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... A valid write cycle requires both CE# and WE# at Vil with OE# at Vih. Write cycle is ignored when either CE# at Vih, WE# a Vih, or OE# at Vil. POWER-UP SEQUENCE Upon power up, MX29LV640D T/B is placed in read array mode. Furthermore, program or erase operation will begin only after successful completion of specified command sequences. P/N:PM1208 ...
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... When WE#, CE# is held at Vil and OE# is held at Vih during power up, the device ignores the first command on the rising edge of WE#. POWER SUPPLY DECOUPLING A 0.1uF capacitor should be connected between the Vcc and GND to reduce the noise effect. P/N:PM1208 MX29LV640D T/B 19 REV. 1.6, AUG. 16, 2008 ...
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... TABLE 3. MX29LV640D T/B COMMAND DEFINITIONS Read Reset Mode Mode Command Word 1st Bus Cyc Addr Addr XXX 555 Data Data F0 2nd Bus Cyc Addr 2AA Data 3rd Bus Cyc Addr 555 Data 4th Bus Cyc Addr X00 Data C2H 5th Bus Cyc ...
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... Byte Device ID Word Byte Secured Silicon Word Byte Sector Protect Verify Word Byte There is an alternative method to that shown in Table 2, which is intended for EPROM programmers and requires Vhv on address bit A9. P/N:PM1208 MX29LV640D T/B Address Data (Hex) X00 C2 X00 C2 X01 22C9/22CB X02 C9/CB X03 98/18 (T) ...
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... AUTOMATIC PROGRAMMING The MX29LV640D T/B can provide the user program function by the form of Byte-Mode or Word-Mode. As long as the users enter the right cycle defined in the Table.3 (including 2 unlock cycles and A0H), any data user inputs will automatically be programmed into the array. Once the program function is executed, the internal write state controller will automatically execute the algorithms and ...
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... Exceed time limit 0 Note : 1. The status Q3 is the time-out period indicator. When Q3=0, the device is in time-out period and is acceptible to another sector address to be erased. When Q3=1, the device is in erase operation and only erase suspend is valid. P/N:PM1208 MX29LV640D T Togging 0 1 Stop toggling ...
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... Sector erase resume command is valid only when the device is in erase suspend state. After erase resume, user can issue another erase suspend command, but there should be a 4ms interval between erase resume and the next erase suspend. If user issue infinite suspend-resume loop, or suspend-resume exceeds 1024 times, the time for erasing will increase. P/N:PM1208 MX29LV640D T ...
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... QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE MX29LV640D T/B features CFI mode. Host system can retrieve the operating characteristics, structure and vendor- specified information such as identifying information, memory size, byte/word configuration, operating voltages and timing information of this device by CFI mode. The device enters the CFI Query mode when the system writes the CFI Query command, 98H, to address 55H/AAH (depending on Word/Byte mode) any time the device is ready to read array data ...
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... Number of erase regions within device Index for Erase Bank Area 1 [2E,2D same-size sectors in region 1-1 [30, 2F] = sector size in multiples of 256-bytes Index for Erase Bank Area 2 Index for Erase Bank Area 3 Index for Erase Bank Area 4 P/N:PM1208 MX29LV640D T/B Address (h) (Word Mode (not support) ...
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... Page mode (0=not supported) Minimum ACC (acceleration) supply (0= not supported), [D7:D4] for volt, 4D [D3:D0] for 100mV Maximum ACC (acceleration) supply (0= not supported), [D7:D4] for volt, 4E [D3:D0] for 100mV Top/Bottom boot block indicator 02h=bottom boot device 03h=top boot device P/N:PM1208 MX29LV640D T/B Address (h) Address (h) (Word Mode) (Byte Mode ...
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... Maximum voltage may overshoot to Vcc+2V during transition and for less than 20ns during transitions. OPERATING TEMPERATURE AND VOLTAGE Commercial (C) Grade Surrounding Temperature ( Industrial (I) Grade Surrounding Temperature ( Supply Voltages CC V range P/N:PM1208 MX29LV640D T 0° +70° -40° +85° +2 3 +125 +150 o C REV. 1.6, AUG. 16, 2008 ...
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... Very High Voltage for hardware Protect/Unprotect/Auto Select/ Temporary Unprotect/ Accelerated Program Vol Output Low Voltage Voh1 Ouput High Voltage Voh2 Ouput High Voltage Vlko Low Vcc Lock-out Voltage P/N:PM1208 MX29LV640D T/B Min Typ Max ± 1.0uA 35uA ± 1.0uA 9mA 16mA 2mA 4mA 26mA 30mA ...
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... SWITCHING TEST CIRCUITS Vcc TESTED DEVICE 0.1uF Test Condition Output Load : 1 TTL gate Output Load Capacitance,CL : 30pF Rise/Fall Times : 5ns In/Out reference levels :1.5V SWITCHING TEST WAVEFORMS 3.0V 0.0V INPUT P/N:PM1208 MX29LV640D T 1.5V Test Points 30 R2 +3.3V DIODES=IN3064 OR EQUIVALENT R1=6.2K ohm R2=2.7K ohm 1.5V OUTPUT REV. 1.6, AUG. 16, 2008 ...
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... Tghel Read recover time before write Twhwh1 Program operation Twhwh1 Program operation Twhwh1 Acc Program operation(Word/Byte) Twhwh2 Sector Erase Operation Tbal Sector Add hold time * Note 1: Sampled only, not 100% tested. P/N:PM1208 MX29LV640D T/B Min Typ 200 ...
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... Figure 1. COMMAND WRITE OPERATION CE# Vih Vil Tcs Vih WE# Vil Toes OE# Vih Vil Vih Addresses Vil Tas Vih Data Vil P/N:PM1208 MX29LV640D T/B Tcwc Tch Twph Twp VA Tah Tdh Tds DIN VA: Valid Address 32 REV. 1.6, AUG. 16, 2008 ...
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... READ/RESET OPERATION Figure 2. READ TIMING WAVEFORMS Vih CE# Vil Vih WE# Vil Vih OE# Vil Vih Addresses Vil HIGH Z Voh Outputs Vol P/N:PM1208 MX29LV640D T/B Tce Toeh Toe Toh Taa Trc ADD Valid DATA Valid 33 Tdf HIGH Z REV. 1.6, AUG. 16, 2008 ...
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... Tready2 RESET# PIN Low (NOT During Automatic Algorithms) to Read or Write Figure 3. RESET# TIMING WAVEFORM CE#, OE# WE# RY/BY# RESET# Reset Timing during Automatic Algorithms CE#, OE# RY/BY# RESET# P/N:PM1208 MX29LV640D T/B Tready1 Trp1 Trh Trp2 Tready2 Reset Timing NOT during Automatic Algorithms 34 Setup Speed Unit MIN 10 us ...
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... ERASE/PROGRAM OPERATION Figure 4. AUTOMATIC CHIP ERASE TIMING WAVEFORM CE# WE# Tcs Tghwl OE# Last 2 Erase Command Cycle Twc 2AAh Address Data RY/BY# SA: 555h for chip erase P/N:PM1208 MX29LV640D T/B Tch Twp Twph Read Status Tah Tas SA Tds Tdh 55h 10h Tbusy Progress Complete Trb REV ...
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... Figure 5. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM1208 MX29LV640D T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H Data# Polling Algorithm or ...
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... Figure 6. AUTOMATIC SECTOR ERASE TIMING WAVEFORM CE# Tch Twp WE# Twph Tcs Tghwl OE# Last 2 Erase Command Cycle Twc 2AAh Address Address 0 Tds Tdh 55h Data RY/BY# P/N:PM1208 MX29LV640D T/B Tbal Tas Sector Sector Sector Address 1 Address n Tah 30h 30h 30h Tbusy 37 Read Status Twhwh2 Progress Complete Trb REV ...
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... Figure 7. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART P/N:PM1208 MX29LV640D T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address NO Last Sector ...
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... Figure 8. ERASE SUSPEND/RESUME FLOWCHART P/N:PM1208 MX29LV640D T/B START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H ERASE RESUME Continue Erase Another NO Erase Suspend ? YES 39 REV. 1.6, AUG. 16, 2008 ...
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... Figure 9. AUTOMATIC PROGRAM TIMING WAVEFORMS CE# WE# Tcs Tghwl OE# Last 2 Program Command Cycle 555h Address Data RY/BY# Figure 10. Accelerated Program Timing Diagram (9.5V ~ 10.5V) Vhv WP#/ACC Vil or Vih 250ns P/N:PM1208 MX29LV640D T/B Tch Twhwh1 Twp Twph Last 2 Read Status Cycle Tah Tas PA Tdh Tds A0h PD Tbusy Status ...
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... Figure 11. CE# CONTROLLED WRITE TIMING WAVEFORM WE# CE# Tghwl OE# 555h Address Data RY/BY# P/N:PM1208 MX29LV640D T/B Twhwh1 or Twhwh2 Tcep Tceph Tah Tas PA Tdh Tds A0h PD Tbusy Status DOUT REV. 1.6, AUG. 16, 2008 ...
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... Figure 12. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART next address P/N:PM1208 MX29LV640D T/B START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data A0H Address 555H Write Program Data/Address Data# Polling Algorithm or Toggle Bit Algorithm No Read Again Data: Program Data? YES No Last Word to be ...
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... SECTOR GROUP PROTECT/CHIP UNPROTECT Figure 13. SECTOR GROUP PROTECT/CHIP UNPROTECT WAVEFORM (RESET# Control) 1us CE# WE# OE# Data 60h SA, A6 A1, A0 Vhv Vih RESET# P/N:PM1208 MX29LV640D T/B 150uS: Sector Protect 15mS: Chip Unprotect Verification 60h 40h VA VA VA: valid address 43 Status VA REV. 1.6, AUG. 16, 2008 ...
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... Figure 14-1. IN-SYSTEM SECTOR GROUP PROTECT WITH RESET#=Vhv Retry Count +1 Retry Count=25? Yes Device fail P/N:PM1208 MX29LV640D T/B START Retry count=0 RESET#=Vhv Wait 1us Temporary Unprotect Mode No First CMD=60h? Yes Write Sector Address with [A6,A1,A0]:[0,1,0] data: 60h Wait 150us Write Sector Address ...
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... Figure 14-2. CHIP UNPROTECT ALGORITHMS WITH RESET#=Vhv Retry Count +1 Retry Count=1000? Device fail P/N:PM1208 MX29LV640D T/B START Retry count=0 RESET#=Vhv Wait 1us Temporary Unprotect No First CMD=60h? Yes No All sectors protected? Yes Write [A6,A1,A0]:[1,1,0] data: 60h Wait 15ms Write [A6,A1,A0]:[1,1,0] data: 40h Read [A6,A1,A0]:[1,1,0] ...
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... RESET# Rise Time to Vhv and Vhv Fall Time to RESET# Tvhhwl Trsp RESET# Vhv to WE# Low Figure 15. TEMPORARY SECTOR GROUP UNPROTECT WAVEFORMS CE# WE# RY/BY# Vhv 10V RESET Vih Trpvhh P/N:PM1208 MX29LV640D T/B Program or Erase Command Sequence Tvhhwl 46 Condition Speed Unit MIN 500 ns MIN 4 us Vil or Vih Trpvhh REV ...
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... Figure 16. TEMPORARY SECTOR GROUP UNPROTECT FLOWCHART Notes: 1. Temporary unprotect all protected sectors Vhv=9.5~10.5V. 2. After leaving temporary unprotect mode, the previously protected sectors are again protected. P/N:PM1208 MX29LV640D T/B Start Apply Reset# pin Vhv Volt Enter Program or Erase Mode Mode Operation Completed (1) Remove Vhv Volt from Reset# ...
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... A1 Vil Vih ADD Vil DATA Vih Q0-Q7 (Byte Mode) Vil DATA Vih Q0-Q15/A-1 (Word Mode) Vil P/N:PM1208 MX29LV640D T/B Tce Toe Toh Taa DATA OUT C2h DATA OUT 00C2h 48 Tdf Toh DATA OUT C9h (TOP boot) CBh (Bottom boot) DATA OUT 22C9h (TOP boot) 22CBh (Bottom boot) REV ...
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... WRITE OPERATION STATUS Figure 18. DATA# POLLING TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) Tce CE# Tch WE# Toe OE# Toeh Trc Address Taa Q7 Q0-Q6 Tbusy RY/BY# P/N:PM1208 MX29LV640D T/B Tdf VA Toh Complement Status Data True Status Data Status Data True 49 VA High Z Valid Data High Z Valid Data REV. 1.6, AUG. 16, 2008 ...
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... Figure 19. DATA# POLLING ALGORITHM Notes: 1. For programming, valid address meas program address. For erasing, valid address meas erase sectors address should be rechecked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM1208 MX29LV640D T/B Start Read Q7~Q0 at valid address (Note Data# ? Yes ...
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... Figure 20. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) Tce CE# Tch WE# Toe OE# Toeh Trc Address VA Taa Q6/Q2 Tbusy RY/BY Valid Address P/N:PM1208 MX29LV640D T/B Tdf VA Toh Valid Status Valid Status Valid Data (second read) (stops toggling) (first read Valid Data REV. 1.6, AUG. 16, 2008 ...
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... Figure 21. TOGGLE BIT ALGORITHM Notes: 1. Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 changes to "1". P/N:PM1208 MX29LV640D T/B Start Read Q7-Q0 Twice (Note Toggle ? YES YES Read Q7~Q0 Twice NO Q6 Toggle ? YES ...
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... Tflqz BYTE# from L to Output Hiz Tfhqv BYTE# from H to Output Active Figure 22. BYTE# TIMING WAVEFORM FOR READ OPERATIONS (BYTE# switching from byte mode to word mode) CE# OE# BYTE# Q0~Q14 Q15/A-1 P/N:PM1208 MX29LV640D T/B MAX MAX MIN Telfh DOUT DOUT (Q0-Q7) (Q0-Q14) DOUT VA (Q15) ...
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... Vol Vih WP#/ACC Vil Figure A. AC Timing at Device Power-Up Symbol Parameter Tvr Vcc Rise Time Tr Input Signal Rise Time Tf Input Signal Fall Time Tvcs Vcc Setup Time P/N:PM1208 MX29LV640D T/B Tvr Tvcs Tf Tf Taa Valid Address High Z Min. 54 Tce Tr Toe ...
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... Input Voltage voltage difference with GND on all normal pins input Input Current Pulse All pins included. Test conditions: Vcc = 3.0V, one pin per testing TSOP PIN CAPACITANCE Parameter Symbol Parameter Description CIN2 Control Pin Capacitance COUT Output Capacitance CIN Input Capacitance P/N:PM1208 MX29LV640D T/B LIMITS MIN. TYP. MAX 0.7 2 100,000 50 160 45 ...
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... MX29LV640DTXEC-90G 90 MX29LV640DBXEC-90G 90 MX29LV640DTXEI-90G 90 MX29LV640DBXEI-90G 90 MX29LV640DTTI-90G 90 MX29LV640DBTI-90G 90 * 44-pin SOP is only for Pachinko Socket P/N:PM1208 MX29LV640D T/B Ball Pitch/ PACKAGE Ball size 44 Pin SOP 44 Pin SOP 48 Pin TSOP(Normal Type) 48 Pin TSOP(Normal Type) 0.8mm/0.4mm 48 Ball LFBGA 0.8mm/0.4mm 48 Ball LFBGA 0.8mm/0.4mm 48 Ball LFBGA ...
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... PART NAME DESCRIPTION 640 P/N:PM1208 MX29LV640D T OPTION: G: Lead-free package SPEED: 90: 90ns TEMPERATURE RANGE: C: Commercial (0˚C to 70˚C) I: Industrial (-40˚C to 85˚C) PACKAGE: M:SOP T: TSOP X: FBGA (CSP 0.4mm Ball BOOT BLOCK TYPE: T: Top Boot B: Bottom Boot REVISION: D DENSITY & MODE: ...
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... PACKAGE INFORMATION P/N:PM1208 MX29LV640D T/B 58 REV. 1.6, AUG. 16, 2008 ...
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... P/N:PM1208 MX29LV640D T/B 59 REV. 1.6, AUG. 16, 2008 ...
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... P/N:PM1208 MX29LV640D T/B 60 REV. 1.6, AUG. 16, 2008 ...
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... Redefined Trv (Vcc Rise Time) min. spec 5. Revised Tdf spec from 30ns(max.) to 16ns(max.) 1.4 1. Changed Vhv spec from 10.5V~11.5V to 9.5V~10.5V 2. Added note Characteristics 1.5 1. Modified DATA at Silicon ID Dead Timing Waveform 1.6 1. Renamed CSP package as LFBGA P/N:PM1208 MX29LV640D T/B Page P31,54 P1 P1,29,55 P1, 31,55 P1,55 P56,57 All P41 P31,54 ...
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... Tel: +81-44-246-9100 Fax: +81-44-246-9105 Macronix (Hong Kong) Co., Limited. 702-703, 7/F, Building 9, Hong Kong Science Park, 5 Science Park West Avenue, Sha Tin, N.T. Tel: +86-852-2607-4289 Fax: +86-852-2607-4229 http : //www.macronix.com MX29LV640D T O., TD. Taipei Office Macronix, Int'l Co., Ltd. 19F, 4, Min-Chuan E. Road, Sec. 3, Taipei, Taiwan, R.O.C. Tel: +886-2-2509-3300 Fax: +886-2-2509-2200 Macronix Europe N ...