MX29LV640D MCNIX [Macronix International], MX29LV640D Datasheet - Page 61

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MX29LV640D

Manufacturer Part Number
MX29LV640D
Description
64M-BIT [8M x 8/4M x 16] SINGLE VOLTAGE 3V
Manufacturer
MCNIX [Macronix International]
Datasheet

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REVISION HISTORY
P/N:PM1208
Revision No. Description
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1. Modified Tvcs from 50us(Min.) to 100us(Min.)
2. Modified latch-up protected to 250mA-->100mA
3. Modified latch-up characteristics
4. Modified sector erase resume section ...should be a 400us-->4ms P24
5. Modified "sector erase time" from 0.9s(typ)/15s(max) to
1. Erase/ Program test methodology comply with JEDEC standard
2. Added Byte# mode and removed NC pin of the pin description table P2
3. Added industrial grade information
1. Removed 44-sop package information
2. Modified figure 11. CE# controlled write timing waveform
3. Modified Tvcs from 100us to 200us
4. Added overshoot/undershoot information
1. Added 44-pin SOP package solution
2. Corrected wrong security sector address
3. Corrected wrong ID code data
4. Redefined Trv (Vcc Rise Time) min. spec
5. Revised Tdf spec from 30ns(max.) to 16ns(max.)
1. Changed Vhv spec from 10.5V~11.5V to 9.5V~10.5V
2. Added note 1 of AC Characteristics
1. Modified DATA at Silicon ID Dead Timing Waveform
1. Renamed CSP package as LFBGA
0.7s(typ)/2s(max)
61
MX29LV640D T/B
Page
P31,54
P1
P1,29,55
P1, 31,55
P1,55
P56,57
All
P41
P31,54
P28
P2,56,57
P8,12
P21
P54
P31
P29,40,47
P31
P48
P2,56
REV. 1.6, AUG. 16, 2008
Date
MAY/02/2007
SEP/03/2007
OCT/23/2007
JAN/25/2008
APR/08/2008
MAY/29/2008
AUG/15/2008

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