QL2009-0PB256C ETC [List of Unclassifed Manufacturers], QL2009-0PB256C Datasheet - Page 7

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QL2009-0PB256C

Manufacturer Part Number
QL2009-0PB256C
Description
3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
Pin
TDI
TRSTB
TMS
TCK
TDO
STM
I/ACLK
I/GCLK
I
I/O
VCC
GND
QL2009
pASIC 2 device
Speed Grade
X = quick
0 = fast
1 = faster
2 = fastest
pASIC device
part number
QuickLogic
Function
Test Data In for JTAG
Active low Reset for JTAG
Test Mode Select for JTAG
Test Clock for JTAG
Test data out for JTAG
Special Test Mode
High-drive input and/or array
network driver
High-drive input and/or global
network driver
High-drive input
Input/Output pin
Power supply pin
Ground pin
QL 2009 - 1 PQ208 C
PIN DESCRIPTIONS
Hold LOW during normal operation. Connect to
Description
Hold HIGH during normal operation. Connect to
VCC if not used for JTAG.
ground if not used for JTAG.
Hold HIGH during normal operation. Connect to
VCC if not used for JTAG.
Hold HIGH or LOW during normal operation.
Connect to VCC or ground if not used for JTAG.
Output that must be left unconnected if not used for JTAG.
Must be grounded during normal operation.
Can be configured as either or both.
Can be configured as either or both.
Use for input signals with high fanout.
Can be configured as an input and/or output.
Connect to 3.3V supply.
Connect to ground.
3-41
Operating Range
Package Code
C = Commercial
I = Industrial
PF144 = 144-pin TQFP
PQ208 = 208-pin PQFP
PB256 = 256-pin PBGA
ORDERING
INFORMATION
3

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