DM9161BIEP DAVICOM [Davicom Semiconductor, Inc.], DM9161BIEP Datasheet - Page 25

• Manufacturer Part Number: DM9161BIEP
• Description: Industrial-grade 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
• Manufacturer: DAVICOM [Davicom Semiconductor, Inc.]

8.3 PHY ID Identifier Register #1 (PHYID1) - 02
The PHY Identifier Registers #1 and #2 work together in a single identifier of the DM9161BI. The Identifier consists
of a concatenation of the Organizationally Unique Identifier (OUI), a vendor's model number, and a model revision
number. DAVICOM Semiconductor's IEEE assigned OUI is 00606E.
8.4 PHY ID Identifier Register #2 (PHYID2) - 03
25
3.15-3.10
2.15-2.0
3.9-3.4
3.3-3.0
1.1
1.0
Bit
Bit
Jabber detect
VNDR_MDL
MDL_REV
OUI_MSB
Bit Name
Bit Name
OUI_LSB
Extended
capability
<101110>,
<001011>,
0, RO/LH
<0181h>
<0000>,
Default
Default
1,RO/P
RO/P
RO/P
RO/P
Industrial-grade 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
1 = Valid link is established (for either 10Mbps or 100Mbps operation)
0 = Link is not established
The link status bit is implemented with a latching function, so that the
occurrence of a link failure condition causes the link status bit to be
cleared and remain cleared until it is read via the management
interface
Jabber Detect
1 = Jabber condition detected
0 = No jabber
This bit is implemented with a latching function. Jabber conditions will
set this bit unless it is cleared by a read to this register through a
management interface or a DM9161BI reset. This bit works only in
10Mbps mode
Extended Capability
1 = Extended register capable
0 = Basic register capable only
OUI Most Significant Bits
This register stores bit 3 to 18 of the OUI (00606E) to bit 15 to 0 of
this register respectively. The most significant two bits of the OUI
are ignored (the IEEE standard refers to these as bit 1 and 2)
OUI Least Significant Bits
Bit 19 to 24 of the OUI (00606E) are mapped to bit 15 to 10 of this
register respectively
Vendor Model Number
Five bits of vendor model number mapped to bit 9 to 4 (most
significant bit to bit 9)
Model Revision Number
Five bits of vendor model revision number mapped to bit 3 to 0
(most significant bit to bit 4)
Description
Description
Version: DM9161BI-12-DS-P01
DM9161BI
July 16, 2008
Preliminary