MN838850 PANASONIC [Panasonic Semiconductor], MN838850 Datasheet
MN838850
Related parts for MN838850
MN838850 Summary of contents
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... MN838850 Source Driver for LCD Panel Drive Overview The MN838850 converts digital display data from a personal computer or an engineering workstation to analog signal voltages to allow those signals to be displayed on a color TFT LCD panel. Features Includes a built-in D/A converter and accepts 8-bit digital input data for 16.7-million color display. ...
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... MN838850 Block Diagram AVDD AVSS 10 VREF0 to 9 POL 2 VOPU, VOPL D00 to D07 8 8 D10 to D17 8 D20 to D27 8 8 D30 to D37 8 Latch 8 D40 to D47 8 8 D50 to D57 8 INV1 INV2 PLSR PRSL 2 Output Circuit D/A Converter Two-line 384 8-bit latch ...
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... D13 62 D12 63 D11 64 D10 65 D07 66 D06 67 D05 68 D04 69 D03 70 D02 71 D01 72 D00 73 PLSR Cu Foil Surface Top View MN838850 Y384 Y383 Y382 Y381 Y380 · · · · · · · · · · · · · · · · · · ...
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... MN838850 Pin Descriptions Pin No. I/O D00 to D07 I D10 to D17 D20 to D27 D30 to D37 D40 to D47 D50 to D57 Y1 to Y384 O PLSR I/O PRSL POL I INV1 I INV2 VREF0 VOPU, VOPL I AVDD I AVSS DVDD I DVSS TEST I 4 Pin Name Image data input Image data input pins ...
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... R10 R12 R14 R16 B6 B8 B10 B12 B14 B16 G6 G8 G10 G12 G14 G16 MN838850 ( ······, 64) ············ R17 ...
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... Figure 2 Relationship between Input and Output Pins (When RL is low and the shift direction is Y384 to Y1) 6 LCD Panel MN838850 G6 G8 G10 G12 G14 G16 B6 B8 B10 B12 B14 B16 R6 R8 R10 R12 R14 R16 ...
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... POL One horizontal period Y2n VREF4 to 0 VREF9 to 5 Positive Negative polarity polarity Positive Negative polarity polarity POL Switching Timing First data Last data Details of the POL Switching Timing MN838850 Negative polarity Positive Opposite electrode polarity voltages First data Last data 7 ...
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... MN838850 Functional Description (continued) Dot inversion drive (continued) Next we describe dot inversion drive operation. The symbol " " here means a voltage that is positive with respect to the voltage on the opposite electrode, and " " means a voltage that is negative with respect to the voltage on the opposite electrode. ...
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... RGB data 1 Start pulse 64 clock cycles ··· 125 ··· 126 Data acquired by driver A 2 PLSR PRSL PLSR PRSL Driver A Driver B MN838850 Driver B 127 129 131 133 128 130 132 134 PLSR PRSL Driver C 9 ...
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... MN838850 Functional Description (continued) Relationship between input data values and output voltages The IC outputs voltages with discrete values and differing polarities for the odd and even output pins with respect to the common electrode. The output voltage is determined by the input data value, the correction voltages (VREF0 to VREF9), VOPL, VOPU, and POL ...
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... If the voltages are directly applied by the resistor divider, the desired output voltages may not result. IC internal circuits VREF9 R0 (2000 ) VREF8 R1 (3800 ) VREF7 R2 (4500 ) VREF6 R3 (3700 ) VREF5 VREF4 R4 (3700 ) VREF3 R5 (4500 ) VREF2 R6 (3800 ) VREF1 R7 (2000 ) VREF0 MN838850 Data correspondence High-level FF output side 00 Low-level 00 output side FF 11 ...
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... MN838850 Functional Description (continued) Table 1 Relationship between VREF Voltages and Analog Output Voltages (High-level side) (Values are examples) VREF5 9.200, VREF6 10.635, VREF7 Display data 00 VOPU 63/31 (42 01 VOPU 63/31 (84 02 VOPU 63/31 (126 · · · 0D VOPU 63/31 (588 VREF8 692 0E VOPU 63/31 (630 VREF8 650 ...
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... VREF7) /1395 VREF6 1407 VREF7) /1395 VREF7) /1395 VREF7) /1395 VREF7) /1395 VREF7) /1395 VREF7) /1395 VREF7) /1395 VREF7) /1395 VREF7) /1395 VREF7) /1395 MN838850 14.630, VOPU 11.250 Voltage level Voltage level difference 9.408 0.015 9.423 0.015 9.439 0.015 9.611 0.015 9 ...
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... MN838850 Functional Description (continued) Table 1 (continued) Relationship between VREF Voltages and Analog Output Voltages (High-level side) (Values are examples) VREF5 9.200, VREF6 10.635, VREF7 Display data A0 VOPU 63/31 (365 A1 VOPU 63/31 (378 A2 VOPU 63/31 (391 · · · AD VOPU 63/31 (534 VREF6 906 AE VOPU 63/31 (547 VREF6 893 ...
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... VREF2 2400 VREF1) /2356 VREF2 2368 VREF1) /2356 VREF2 2336 VREF1) /2356 VREF2 1984 VREF1) /2356 VREF2 1952 VREF1) /2356 VREF2 1920 VREF1) /2356 MN838850 14.630, VOPU 11.250 Voltage level Voltage level difference 12.596 0.051 12.647 0.051 12.699 0.051 13.263 0.051 13 ...
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... MN838850 Functional Description (continued) Table 2 (continued) Relationship between VREF Voltages and Analog Output Voltages (Low-level side) (Values are examples) VREF0 1.760, VREF1 2.536, VREF2 Display data 30 VOPL 63/31 (538 31 VOPL 63/31 (564 32 VOPL 63/31 (590 · · · 3D VOPL 63/31 (876 3E VOPL 63/31 (902 3F VOPL 63/31 (928 ...
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... VREF3 654 VREF2) /1395 VREF3 636 VREF2) /1395 VREF3 618 VREF2) /1395 VREF3 420 VREF2) /1395 VREF3 402 VREF2) /1395 VREF3 384 VREF2) /1395 MN838850 7.190, VOPL 3.750 Voltage level Voltage level difference 3.468 0.013 3.454 0.013 3.440 0.013 3.289 0.013 3 ...
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... MN838850 Functional Description (continued) Table 2 (continued) Relationship between VREF Voltages and Analog Output Voltages (Low-level side) (Values are examples) VREF0 1.760, VREF1 2.536, VREF2 Display data D0 VOPL 63/31 (1080 D1 VOPL 63/31 (1104 D2 VOPL 63/31 (1128 · · · DD VOPL 63/31 (1392 DE VOPL 63/31 (1416 DF VOPL 63/31 (1440 ...
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... A signal. The output analog voltages may be displaced or shifted if the data bus levels are changed with that timing signal 1 clock cycle (max.) Start pulse PLSR(RL "H") PRSL(RL "L") N-2 Data Last data value N s(min.) Period during which the data must be held fixed MN838850 4 clock cycle (min First data value 19 ...
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... MN838850 Functional Description (continued) Data inversion control function All the bits in the input image data can be inverted at the same time, thus creating new data values to be used by controlling the INV1 and INV2 pins. INV1 inverts the D0(7:0), D1(7:0), and D2(7:0) data and INV2 inverts the D3(7:0), D4(7:0), and D5(7:0) data. ...
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... VSS VSS Symbol Rating D 0.3 to 7.0 VDD A 0 VDD opr 110 stg MN838850 Period during which clock input may be stopped Unit V V 0.3 V VDD 0.3 V VDD 0.3 V VDD 0.3 V VDD ...
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... MN838850 Electrical Characteristics (continued) 2. Operating Conditions at A VSS Parameter Operating digital system supply voltage Operating analog system supply voltage correction voltage input voltage range V Operating frequency Digital signal input capacitance correction voltage input capacitance VOPL input voltage range VOPU input voltage range ...
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... V O VDD VDD DUT SS2 I SS1 A VDD VDD · · A · · · · D · VSS Y384 0 V MN838850 (continued) VSS a Min Typ Max 0 VDD VDD 0 0.3 D VDD 100 350 100 100 0.5 0.2 0.2 0.5 ...
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... MN838850 Electrical Characteristics (continued Characteristics VDD Parameter FY period Clock high-level period Clock low-level period Data and INV setup time Data and INV hold time Start pulse setup time Start pulse hold time Start pulse low-level period Start pulse high-level period ...
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... Unless otherwise specified, the digital input and output levels are VDD wcH hd1 wsL st2 hd2 t wsH t wA st3 0.3 D VDD . IL OL MN838850 t wcL Target output voltage 20 mV (not including the deviation) Target output voltage Hi-Z 25 ...
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... MN838850 Electrical Characteristics (continued Characteristics (continued) FY Input PLSR(RL "H") PRSL(RL "L") Dxx INV1 INV2 FY A singal Dxx INV1 Valid INV2 26 t ng1 t t st2 hd2 t st1 t ng2 t t st1 hd1 Valid Valid Valid Color TFT LCD Driver t hd1 ...