MN838850 PANASONIC [Panasonic Semiconductor], MN838850 Datasheet - Page 19

• Manufacturer Part Number: MN838850
• Description: Source Driver for LCD Panel Drive
• Manufacturer: PANASONIC [Panasonic Semiconductor]

Color TFT LCD Driver
Start pulse
PLSR(RL "H")
PRSL(RL "L")
Relationship between the A signal, the image input timing, and the start pulse
Functional Description (continued)
The figure below shows the relationship between the A signal, the image data input timing, and the start pulse.
The last data of the image should be input within one clock cycle of the fall of the A signal. Data input two or more clock
cycles later will not be transmitted to the analog outputs and the IC will not be able to output the correct analog voltage.
And also hold the levels of the data bus fixed from 1 s before the rise of the A signal until 4 clock cycles after the rise
of the A signal. The output analog voltages may be displaced or shifted if the data bus levels are changed with that
timing.
A signal
Data
FY
1 clock cycle (max.)
Last data value
N-2
N-1
N
Period during which the data must be held fixed
1 s(min.)
4 clock cycle (min.)
MN838850
1
2
First data value
3
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