N74F786D,602 NXP Semiconductors, N74F786D,602 Datasheet - Page 3

• Manufacturer Part Number: N74F786D,602
• Description: IC ASYNC BUS ARBITER 16-SOIC
• Manufacturer: NXP Semiconductors
• Series: 74Fr

Specifications of N74F786D,602

• Logic Type: Bus Arbiter
• Supply Voltage: 4.5 V ~ 5.5 V
• Number Of Bits: 4
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-3185-5; 933906250602; N74F786D

Philips Semiconductors
FUNCTIONAL DESCRIPTION
The BRn inputs have no inherent priority. The arbiter assigns priority
to the incoming requests as they are received, therefore, the first BR
asserted will have the highest priority. When a bus request is
received its corresponding bus grant becomes active, provided that
EN is low. If additional bus requests are made during this time they
are queued. When the first request is removed, the arbiter services
the bus request with the next highest priority. Removing a request
while a previous request is being serviced can cause a grant to be
changed when arbitrating between three or four requests. For that
reason, the user should not remove ungranted requests when
arbitrating between three or four requests. This does not apply to
arbitration between two requests.
If two or more BRn inputs are asserted at precisely the same time,
one of them will be selected at random, and all BGn outputs will be
held in the high state until the selection is made. This guarantees
that an erroneous BGn will not be generated even though a
metastable condition may occur internal to the device. When the EN
is in the high state the BGn outputs are forced high.
PIN DESCRIPTION
February 14, 1991
BG0 – BG3
BR0 – BR3
A, B, C, D
4-bit asynchronous bus arbiter
SYMBOL
YOUT
GND
V
EN
CC
13, 12, 11, 10
15, 1, 2, 3
4, 5, 6, 7
PINS
14
16
9
8
Ground
Output
Output
Power
TYPE
Input
Input
Input
Bus request inputs (active low)
Inputs of the 4–input AND gate
Enable input
Bus grant outputs (active low)
Output of the 4–input AND gate
ground (0V)
Positive supply voltages
NAME
3
PIN CONFIGURATION
The logic of this device arbitrates between these four inputs.
Unused inputs should be tied high.
When low it enables the BG0 – BG3 outputs.
These outputs indicate the selected bus request. BG0 corre-
sponds to BR0, BG1 to BR1, etc.
GND
BR0
BR1
BR2
BR3
C
D
B
1
2
3
4
5
6
7
8
FUNCTION
SF00441
16
15
14
13
12
11
10
9
V
A
YOUT
BG0
BG1
BG2
BG3
EN
CC
Product specification
74F786