MAX195BEPE Maxim Integrated, MAX195BEPE Datasheet - Page 6

• Manufacturer Part Number: MAX195BEPE
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX195BEPE

• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 85 KSPs
• Resolution: 16 bit
• Input Type: Single-Ended
• Snr: Yes
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Package / Case: PDIP N
• Maximum Power Dissipation: 842 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 5 V

In an ideal DAC, each of the capacitors associated with
the data bits would be exactly twice the value of the
next smaller capacitor. In practice, this results in a
range of values too wide to be realized in an economi-
cally feasible size. The capacitor array actually consists
of two arrays, which are capacitively coupled to reduce
the LSB array’s effective value. The capacitors in the
MSB array are production trimmed to reduce errors.
Small variations in the LSB capacitors contribute
insignificant errors to the 16-bit result.
Unfortunately, trimming alone does not yield 16-bit per-
formance or compensate for changes in performance
due to changes in temperature, supply voltage, and
other parameters. For this reason, the MAX195 includes
a calibration DAC for each capacitor in the MSB array.
These DACs are capacitively coupled to the main DAC
16-Bit, 85ksps ADC with 10µA Shutdown
Figure 1. Capacitor DAC Functional Diagram
Figure 2. Initiating Calibration
6
_______________________________________________________________________________________
AGND
REF
AIN
RESET
EOC
CLK
MSB
32,768C
t
OPERATION HALTS
RCH
MAX195
16,384C
t
CALIBRATION
RCS
BEGINS
Calibration
4C
t
2C
CAL
output and offset the main DAC’s output according to
the value on their digital inputs. During calibration, the
correct digital code to compensate for the error in each
MSB capacitor is determined and stored. Thereafter,
the stored code is input to the appropriate calibration
DAC whenever the corresponding bit in the main DAC
is high, compensating for errors in the associated
capacitor.
The MAX195 calibrates automatically on power-up. To
reduce the effects of noise, each calibration experiment
is performed many times and the results are averaged.
Calibration requires about 14,000 clock cycles, or
8.2ms at the highest clock (CLK) speed (1.7MHz). In
addition to the power-up calibration, bringing RESET
low halts MAX195 operation, and bringing it high again
initiates a calibration (Figure 2).
LSB
C
CALIBRATION
DUMMY
ENDS
C