MAX195BEPE Maxim Integrated, MAX195BEPE Datasheet - Page 9

• Manufacturer Part Number: MAX195BEPE
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX195BEPE

• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 85 KSPs
• Resolution: 16 bit
• Input Type: Single-Ended
• Snr: Yes
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Package / Case: PDIP N
• Maximum Power Dissipation: 842 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 5 V

Figure 5. Gating
Figure 6. Output Data Format, Reading Data During Conversion (Mode 1)
If you read the data bits between conversions, you can:
1) count CLK cycles until the end of the conversion, or
2) poll EOC to determine when the conversion is
3) generate an interrupt on EOC’s falling edge.
finished, or
CASE 1: CLK IDLES LOW, DATA LATCHED ON RISING EDGE (CPOL = 0, CPHA = 0)
CASE 2: CLK IDLES LOW, DATA LATCHED ON FALLING EDGE (CPOL = 0, CPHA = 1)
NOTE: ARROWS ON CLK TRANSITIONS INDICATE LATCHING EDGE
(CASE 1)
(CASE 2)
CONV
DOUT
CLK
CLK
EOC
CONV to Synchronize with CLK
CS
16-Bit, 85ksps ADC with 10µA Shutdown
_______________________________________________________________________________________
START
CONV
CLK
B15 FROM PREVIOUS
START
CONVERSION
CONVERSION
t
DV
BEGINS
t
CW
B15
MSB
t
CD
t
CEH
B14
B13
B12
CONV
CLK
Note that the MSB conversion result appears at DOUT
after CS goes low, but before the first SCLK pulse.
Each subsequent SCLK pulse shifts out the next con-
version bit. The 15th SCLK pulse shifts out the LSB.
Additional clock pulses shift out zeros.
MAX195
B2
CONVERSION
B1
ENDS
LSB
B0
SEE DIGITAL INTERFACE SECTION
t
CEL
B15
t
DH
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