MK30DN512ZVLQ10R Freescale Semiconductor, MK30DN512ZVLQ10R Datasheet

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MK30DN512ZVLQ10R

Manufacturer Part Number
MK30DN512ZVLQ10R
Description
ARM Microcontrollers - MCU KINETIS 512K LCD
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK30DN512ZVLQ10R

Rohs
yes
Core
ARM Cortex M4
Processor Series
K30
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 KB
Data Ram Size
128 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MK30DN512ZVLQ10R
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
Data Sheet: Technical Data
K30 Sub-Family Data Sheet
Supports the following:
MK30DX128ZVLQ10,
MK30DX128ZVMD10,
MK30DX256ZVLQ10,
MK30DX256ZVMD10,
MK30DN512ZVLQ10,
MK30DN512ZVMD10
Features
• Operating Characteristics
• Performance
• Memories and memory interfaces
• Clocks
• System peripherals
Freescale reserves the right to change the detail specifications as may be
required to permit improvements in the design of its products.
© 2011–2013 Freescale Semiconductor, Inc.
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
– Up to 100 MHz ARM Cortex-M4 core with DSP
– Up to 512 KB program flash memory on non-
– Up to 128 KB RAM
– Serial programming interface (EzPort)
– FlexBus external bus interface
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
– Multiple low-power modes to provide power
– Memory protection unit with multi-master
– 16-channel DMA controller, supporting up to 63
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
instructions delivering 1.25 Dhrystone MIPS per
MHz
FlexMemory devices
optimization based on application requirements
protection
request sources
• Security and integrity modules
• Human-machine interface
• Analog modules
• Timers
– Hardware CRC module to support fast cyclic
– 128-bit unique identification (ID) number per chip
– Segment LCD controller supporting up to 40
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
– Two 16-bit SAR ADCs
– Programmable gain amplifier (PGA) (up to x64)
– Two 12-bit DACs
– Three analog comparators (CMP) containing a 6-bit
– Voltage reference
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
– Two 2-channel quadrature decoder/general purpose
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
redundancy checks
frontplanes and 8 backplanes, or 44 frontplanes and
4 backplanes, depending on the package size
integrated into each ADC
DAC and programmable reference input
timer
timers
K30P144M100SF2
Document Number: K30P144M100SF2
Rev. 7, 02/2013

Related parts for MK30DN512ZVLQ10R

MK30DN512ZVLQ10R Summary of contents

Page 1

... External watchdog monitor – Software watchdog – Low-leakage wakeup unit Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © 2011–2013 Freescale Semiconductor, Inc. Document Number: K30P144M100SF2 Rev. 7, 02/2013 K30P144M100SF2 • Security and integrity modules – ...

Page 2

... Communication interfaces – Two Controller Area Network (CAN) modules – Three SPI modules – Two I2C modules – Six UART modules – Secure Digital host controller (SDHC) – I2S module K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 2 Freescale Semiconductor, Inc. ...

Page 3

... Switching specifications.....................................................20 5.3.1 Device clock specifications...................................20 5.3.2 General switching specifications...........................20 5.4 Thermal specifications.......................................................21 5.4.1 Thermal operating requirements...........................21 K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Table of Contents 5.4.2 Thermal attributes.................................................22 6 Peripheral operating requirements and behaviors....................23 6.1 Core modules....................................................................23 6.1.1 Debug trace timing specifications.........................23 6.1.2 JTAG electricals....................................................24 6 ...

Page 4

... Description • Fully qualified, general market flow • Prequalification • K30 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • Program flash only • Program flash and FlexMemory Table continues on the next page... Values Freescale Semiconductor, Inc. ...

Page 5

... An operating requirement is a specified value or range of values for a technical characteristic that you must guarantee during operation to avoid incorrect operation and possibly decreasing the useful life of the chip. K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Description • • • ...

Page 6

... Example This is an example of an attribute: Symbol Description CIN_D Input capacitance: digital pins K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 6 Min. Max. 0.9 1.1 Min. Max. 10 130 Min. Max. — 7 Unit V Unit µA Unit pF Freescale Semiconductor, Inc. ...

Page 7

... Result of exceeding a rating Measured characteristic K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Terminology and guidelines Max ...

Page 8

... Normal operating range Degraded operating range - No permanent failure - No permanent failure - Correct operation - Possible decreased life - Possible incorrect operation Operating (power on) Handling range No permanent failure Handling (power off) Fatal range Expected permanent failure ∞ Fatal range Expected permanent failure ∞ Freescale Semiconductor, Inc. ...

Page 9

... Typical value conditions Typical values assume you meet the following conditions (or other conditions as specified): Symbol T Ambient temperature A V 3.3 V supply voltage DD K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Terminology and guidelines Max ...

Page 10

... K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 10 Min. Max. Unit –55 150 °C — 260 °C — 245 Min. Max. Unit — 3 — Min. Max. Unit -2000 +2000 V -500 +500 V -100 +100 mA Freescale Semiconductor, Inc. Notes 1 2 Notes 1 Notes ...

Page 11

... Nonswitching electrical specifications K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. General Min. Max. Unit –0.3 3 ...

Page 12

... ESD protection diodes Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — — 0.35 × 0.3 × — — — +5 — — V — less than V or greater IN AIO_MIN -V )/|I |. Select the IN AIO_MAX ICAIO Freescale Semiconductor, Inc ...

Page 13

... Rising thresholds are falling threshold + hysteresis voltage Table 3. VBAT power operating requirements Symbol Description V Falling VBAT supply POR detect voltage POR_VBAT K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. supply LVD and POR operating requirements Min. 0.8 2.48 2.62 2.72 2.82 2.92 — ...

Page 14

... Table continues on the next page... 1 Typ. Max. Unit Notes — — V — — V — — V — — V — 100 mA — 0.5 V — 0.5 V — 0.5 V — 0.5 V — 100 mA 3, 0.5 μA 1.5 μA 10 μA 4, 0.5 μA 0.5 μA 1 μ μ μ μ μA Freescale Semiconductor, Inc ...

Page 15

... CPU and system clocks = 100 MHz • Bus clock = 50 MHz • FlexBus clock = 50 MHz • Flash clock = 25 MHz • MCG mode: FEI K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. — — — — — ...

Page 16

... Table continues on the next page... Max. Unit Notes μs 1 300 1 slew rate) 134 μs 96 μs 96 μs 6.2 μs 5.9 μs 5.9 μs Max. Unit Notes See note — — — Freescale Semiconductor, Inc. ...

Page 17

... I Average current with RTC and 32kHz disabled at DD_VBAT 3.0 V • @ –40 to 25°C • @ 70°C • @ 105°C K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. Typ. — N/A — N/A — 0.59 — 2.26 — ...

Page 18

... Code execution from flash with cache enabled • For the ALLOFF curve, all peripheral clocks are disabled except FTFL K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 18 Min. Typ. Max. Unit — 0.71 0.81 μA — 1.01 1.3 μA — 2.82 4.3 μA — 0.84 0.94 μA — 1.17 1.5 μA — 3.16 4.6 μA Freescale Semiconductor, Inc. Notes 10 ...

Page 19

... TEM Cell Method. Measurements were made while the microcontroller was running basic application code. The reported emission level is the value of the maximum measured emission, rounded up to the next whole number, from among the measured orientations in each frequency range. Freescale Semiconductor, Inc. Frequency band (MHz) 0.15– ...

Page 20

... K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013 MHz 48MHz SYS BUS Table 8. Capacitance attributes Min. Normal run mode — — — — — Min. Max. Unit — — Max. Unit Notes 100 MHz 50 MHz 50 MHz 25 MHz 25 MHz Freescale Semiconductor, Inc. ...

Page 21

... This is the minimum pulse width that is guaranteed to be recognized as a pin interrupt request in Stop, VLPS, LLS, and VLLSx modes load load 5.4 Thermal specifications K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Min. Max. Unit 1.5 — Bus clock ...

Page 22

... K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 22 Min. –40 –40 144 LQFP 144 Unit MAPBGA 45 48 °C °C °C °C °C °C °C/W Max. Unit 125 °C 105 °C Notes Freescale Semiconductor, Inc. ...

Page 23

... Clock and data fall time f T Data setup s T Data hold h Figure 3. TRACE_CLKOUT specifications TRACE_CLKOUT TRACE_D[3:0] Figure 4. Trace data specifications K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Frequency dependent 2 2 — — Max ...

Page 24

... Min. Max. Unit 1.71 3.6 V MHz 1/J1 — ns Freescale Semiconductor, Inc. ...

Page 25

... TCLK low to TDO high-Z J13 TRST assert time J14 TRST setup time (negation) to TCLK high TCLK (input) K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Figure 5. Test clock input timing Min. ...

Page 26

... K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013 J11 J12 J11 Figure 7. Test Access Port timing J5 J6 Input data valid Output data valid Output data valid J9 J10 Input data valid Output data valid Output data valid Freescale Semiconductor, Inc. ...

Page 27

... Loss of external clock minimum frequency — loc_high RANGE = 01, 10 FLL reference frequency range fll_ref K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J14 Figure 8. TRST timing Table 15. MCG specifications Min. Typ. — ...

Page 28

... MHz ps 180 — 150 — — — 100 MHz — µA 600 — µA — 4.0 MHz 120 — — ps — ps 600 — ps — ± 2.98 % — ± 5. — 150 × 1075( pll_ref Freescale Semiconductor, Inc ...

Page 29

... MHz (RANGE=01) • 16 MHz • 24 MHz • 32 MHz C EXTAL load capacitance x C XTAL load capacitance y K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 1.71 — — 500 — 200 — 300 — ...

Page 30

... MΩ — MΩ — — MΩ 1 — MΩ — — kΩ 200 — kΩ — — kΩ 0 — kΩ 0.6 — — 0.6 — — Typ. Max. Unit Notes — 40 kHz — 8 MHz Freescale Semiconductor, Inc. 4 ...

Page 31

... When a crystal is being used with the 32 kHz oscillator, the EXTAL32 and XTAL32 pins should only be connected to required oscillator components and must not be connected to any other devices. K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. ...

Page 32

... Table continues on the next page... Typ. Max. Unit Notes 32.768 — kHz 1000 — ms 32.768 — kHz — BAT Typ. Max. Unit Notes 7.5 18 μs 13 113 ms 416 3616 ms Typ. Max. Unit Notes — 1.7 ms — 60 μs Freescale Semiconductor, Inc ...

Page 33

... Average current adder during high voltage DD_ERS flash erase operation 6.4.1.4 Reliability specifications Table 23. NVM reliability specifications Symbol Description K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — — — — ...

Page 34

... — cycles ≤ 125°C. j Min. Max. 1.71 3.6 — SYS — SYS — EZP_CK 5 — 5 — 2 — 5 — — — — 12 Freescale Semiconductor, Inc. Notes 2 Unit V MHz MHz ...

Page 35

... Data and FB_TA input setup FB5 Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors EP3 EP2 EP4 EP9 ...

Page 36

... Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 36 Min. Max. Unit 1.71 3.6 V — FB_CLK MHz 1/FB_CLK — ns — 13 — ns 13.7 — ns 0.5 — ns Freescale Semiconductor, Inc. Notes ...

Page 37

... FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 10. FlexBus read timing diagram K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ ...

Page 38

... FB_BEn FB_TA FB_TSIZ[1:0] Figure 11. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 38 FB3 Address Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Freescale Semiconductor, Inc. ...

Page 39

... C ADC conversion ≤ 13-bit modes rate rate No ADC hardware averaging Continuous conversions enabled, subsequent conversion time K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table 27 and Table 28 Min. Typ. 1. -100 ...

Page 40

... V REFH DDA 1 Min. Typ. 0.215 — Table continues on the next page... 1 Max. Unit Notes 5 461.467 Ksps /C AS tool. SIMPLIFIED CHANNEL SELECT CIRCUIT ADC SAR ENGINE R ADIN R ADIN R ADIN R ADIN C ADIN , REFL SSA 2 Max. Unit Notes 1 Freescale Semiconductor, Inc. AS ...

Page 41

... Avg = 32 SFDR Spurious free 16-bit differential mode dynamic range • Avg = 32 16-bit single-ended mode • Avg = 32 K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA REFL 1 Min. Typ. ...

Page 42

... DDA REFL 1 Min. Typ. I × 1.55 1.62 706 716 = V REFH DDA = 2.0 MHz unless otherwise stated. Typical values are for ADCK = V ) (continued) SSA 2 Max. Unit Notes leakage current (refer to the MCU's voltage and current operating ratings) 1.69 mV/°C 726 mV Freescale Semiconductor, Inc. ...

Page 43

... Differential input Gain = PGAD impedance Gain = 16, 32 Gain = 64 R Analog source AS resistance T ADC sampling S time K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 Min. Typ. 1.71 — VREF_OU VREF_OU VREF_OU — SSA V — ...

Page 44

... MHz unless otherwise stated. Typical values are for ADCK PGAD Min. Typ. — 420 =1.2V, — 1.54 REFPGA =1.2V, — 0.57 REFPGA Table continues on the next page... Max. Unit Notes 450 Ksps 7 250 Ksps 8 /2 causes drop AS 1 Max. Unit Notes 644 μ — μA — μA Freescale Semiconductor, Inc. ...

Page 45

... Gain=1 ratio • Gain=64 THD Total harmonic • Gain=1 distortion • Gain=64 SFDR Spurious free • Gain=1 dynamic range • Gain=64 K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. 0.95 1 1.9 2 3.8 4 7 ...

Page 46

... Typ. Max. Unit — 3.6 V — 200 μA — 20 μA — — — — — — mV — — V — 0 200 ns Freescale Semiconductor, Inc. ...

Page 47

... VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level LSB = V /64 reference 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 0.1 0.4 0.7 Figure 15. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min — — –0.5 –0.3 -0 1.3 1.6 1.9 2.2 Vin level (V) Typ. ...

Page 48

... K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013 1.3 1.6 1.9 2.2 Vin level (V) Min. 1.71 1.13 Operating temperature range of the device — — or the voltage output of the VREF module (VREF_OUT) DDA HYSTCTR Setting 2.5 2.8 3.1 Max. Unit Notes 3 °C 100 Freescale Semiconductor, Inc. ...

Page 49

... Calculated by a best fit curve from 3.0 V, reference select set for V DDA 0x800, temperature range is across the full range of the device K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — — ...

Page 50

... Peripheral operating requirements and behaviors Figure 17. Typical INL error vs. digital code K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 50 Freescale Semiconductor, Inc. ...

Page 51

... VREF_OUT if the VREF_OUT functionality is being used for either an internal or external L reference. 2. The load capacitance should not exceed +/-25% of the nominal specified C the device. K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. Unit 1.71 3 ...

Page 52

... Min. Max. Unit 0 50 °C Min. Max. Unit 1.173 1.225 V Freescale Semiconductor, Inc. Unit Notes µ µ Notes Notes ...

Page 53

... The delay is programmable in SPIx_CTARn[PASC] and SPIx_CTARn[ASC]. DSPI_PCSn DS3 DSPI_SCK DS7 (CPOL=0) DSPI_SIN DSPI_SOUT Figure 19. DSPI classic SPI timing — master mode K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 2.7 — BUS (t /2) − 2 SCK ( − ...

Page 54

... Table continues on the next page... Min. Max. Unit 2.7 3.6 V 12.5 MHz — ns BUS (t /2) − / SCK SCK — — — — ns — — DS9 DS16 DS11 Last data Last data Max. Unit Notes 3 12.5 MHz — ns Freescale Semiconductor, Inc. ...

Page 55

... DSPI_SIN to DSPI_SCK input setup DS14 DSPI_SCK to DSPI_SIN input hold DS15 DSPI_SS active to DSPI_SOUT driven DS16 DSPI_SS inactive to DSPI_SOUT not driven K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min SCK ( − ...

Page 56

... Fast Mode Unit Minimum Maximum 0 400 kHz 0.6 — 1.3 — 0.6 — 0.6 — 0 100 — +0.1C 300 +0.1C 300 b 0.6 — 1.3 — ≥ 250 ns must SU; DAT + t rmax Freescale Semiconductor, Inc. µs µs µs µs µ µs µs ns SU; DAT ...

Page 57

... SDHC input / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK) SD7 t SDHC input setup time ISU SD8 t SDHC input hold time IH K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors t t SU; DAT f t HD; STA t SU; STA ...

Page 58

... Figure 24. SDHC timing master (clocks driven) and slave S master mode timing (limited voltage range) Min. Max. Unit 2.7 3 SYS 45% 55% MCLK period — ns SYS 45% 55% BCLK period — -2.5 — ns — — — — ns Freescale Semiconductor, Inc. ...

Page 59

... I2S_FS input hold after I2S_BCLK S15 I2S_BCLK to I2S_TXD/I2S_FS output valid S16 I2S_BCLK to I2S_TXD/I2S_FS output invalid S17 I2S_RXD setup before I2S_BCLK S18 I2S_RXD hold after I2S_BCLK K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors ...

Page 60

... SYS 45% 55% MCLK period — ns SYS 45% 55% BCLK period — -4.3 — ns — -4.6 — ns 23.9 — — ns Min. Max. Unit 1.71 3 — ns SYS 45% 55% MCLK period 10 — ns 3.5 — ns — 28 — — — ns Freescale Semiconductor, Inc. ...

Page 61

... DELVOL = 2, EXTCHRG = 15. 12. CAPTRM=7, DELVOL=2, REFCHRG=0, EXTCHRG=4, PS=7, NSCN=0F, LPSCNITV=F, LPO is selected (1 kHz), and fixed external capacitance of 20 pF. Data is captured with an average of 7 periods window. K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...

Page 62

... Max. Unit Notes 58 Hz — — 8000 — V — V — V — V — V — IREG — µA 4 — µA — µA — MΩ — MΩ — V — V — V — V Freescale Semiconductor, Inc. ...

Page 63

... ADC1_SE7a ADC1_SE7a 5 E5 VDD VDD VDD 6 F6 VSS VSS VSS K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc freescale.com and perform a keyword search for the Then use this document number 98ASS23177W 98ASA00222D ALT1 ALT2 ALT3 ALT4 PTE0 ...

Page 64

... PTE16 SPI0_PCS0 UART2_TX FTM_CLKIN0 PTE17 SPI0_SCK UART2_RX FTM_CLKIN1 PTE18 SPI0_SOUT UART2_CTS_ I2C0_SDA b PTE19 SPI0_SIN UART2_RTS_ I2C0_SCL b ALT5 ALT6 ALT7 EzPort FB_CS3_b/ FB_TA_b FB_BE7_0_b FB_TBST_b/ FB_CS2_b/ FB_BE15_8_b FB_ALE/ I2S0_CLKIN FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 FB_AD1 FB_AD0 FTM0_FLT3 LPT0_ALT3 Freescale Semiconductor, Inc. ...

Page 65

... TSI0_CH5 LLWU_P3 EZP_CS_b 55 M8 PTA5 DISABLED 56 E7 VDD VDD VDD 57 G7 VSS VSS VSS K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE24 CAN1_TX UART4_TX PTE25 CAN1_RX UART4_RX PTE26 UART4_CTS_ b PTE27 UART4_RTS_ b PTE28 PTA0 ...

Page 66

... FB_OE_b FTM2_QD_ PHB FB_CS5_b/ I2S0_TXD FTM1_QD_ FB_TSIZ1/ PHA FB_BE23_16_ b FB_CS4_b/ I2S0_TX_FS FTM1_QD_ FB_TSIZ0/ PHB FB_BE31_24_ b FB_AD31 I2S0_TX_ BCLK FB_AD30 I2S0_RXD FB_AD29 I2S0_RX_FS FB_AD28 I2S0_MCLK I2S0_CLKIN LPT0_ALT1 FB_AD14 FB_AD13 FB_AD12 FB_AD11 FB_AD10 FB_AD19 FTM1_QD_ LCD_P0 PHA FTM1_QD_ LCD_P1 PHB Freescale Semiconductor, Inc. ...

Page 67

... LLWU_P6 ADC0_SE15/ ADC0_SE15/ TSI0_CH14 TSI0_CH14 105 A12 PTC2 LCD_P22/ LCD_P22/ ADC0_SE4b/ ADC0_SE4b/ CMP1_IN0/ CMP1_IN0/ TSI0_CH15 TSI0_CH15 K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTB2 I2C0_SCL UART0_RTS_ b PTB3 I2C0_SDA UART0_CTS_ b PTB4 PTB5 PTB6 PTB7 ...

Page 68

... PTD1 SPI0_SCK UART2_CTS_ b PTD2/ SPI0_SOUT UART2_RX LLWU_P13 PTD3 SPI0_SIN UART2_TX ALT5 ALT6 ALT7 EzPort LCD_P23 CMP1_OUT LCD_P24 CMP0_OUT LCD_P25 LCD_P26 LCD_P27 LCD_P28 FTM2_FLT0 LCD_P29 LCD_P30 LCD_P31 LCD_P32 LCD_P33 LCD_P34 LCD_P35 LCD_P36 LCD_P37 LCD_P38 LCD_P39 LCD_P40 LCD_P41 LCD_P42 LCD_P43 Freescale Semiconductor, Inc. ...

Page 69

... The below figure shows the pinout diagram for the devices supported by this document. Many signals may be multiplexed onto a single pin. To determine what signals can be used on which pin, see the previous section. K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ...

Page 70

... PTB22 PTB21 100 99 PTB20 PTB19 98 97 PTB18 PTB17 96 95 PTB16 VDD 94 93 VSS PTB11 92 91 PTB10 PTB9 90 PTB8 89 PTB7 88 PTB6 87 PTB5 86 PTB4 85 PTB3 84 PTB2 83 82 PTB1 PTB0 81 80 PTA29 PTA28 79 78 PTA27 PTA26 77 76 PTA25 PTA24 75 RESET_b 74 PTA19 73 Freescale Semiconductor, Inc. ...

Page 71

... Figure 28. K30 144 MAPBGA Pinout Diagram 9 Revision History The following table provides a revision history for this document. Rev. No. Date Substantial Changes 1 11/2010 Initial public revision K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc PTC8 PTD0 PTC16 PTC12 ...

Page 72

... Added LCD glass capacitance footnote K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. 72 footnote in "Voltage and Current Operating Requirements" table. IC spec in "Power consumption operating behaviors" table DD_VBAT Table continues on the next page... Freescale Semiconductor, Inc. ...

Page 73

... In "SDHC specifications", removed the operating voltage limits and updated the SD1 and SD6 specs. • In "I2S switching specifications", added separate specification tables for the full operating voltage range. K30 Sub-Family Data Sheet Data Sheet, Rev. 7, 02/2013. Freescale Semiconductor, Inc. numbers in 'Power consumption operating behaviors' section. DD_RUN . LAT ...

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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...

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