MPC8536EAVTATLA Freescale Semiconductor, MPC8536EAVTATLA Datasheet - Page 43

• Manufacturer Part Number: MPC8536EAVTATLA
• Description: Microprocessors - MPU 8536 ENCRYPTED
• Manufacturer: Freescale Semiconductor

Specifications of MPC8536EAVTATLA

• Product Category: Microprocessors - MPU
• Rohs: yes
• Processor Series: PowerQUICC III
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 250 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 512 KB
• Interface Type: I2C, USB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: 0 C to + 105 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-783

2.9.2.2
This section describes the GMII transmit and receive AC timing specifications.
2.9.2.2.1
This table provides the GMII transmit AC timing specifications.
Freescale Semiconductor
At recommended operating conditions with L/TV
GTX_CLK clock period
GTX_CLK to GMII data TXD[7:0], TX_ER, TX_EN delay
GTX_CLK data clock rise time (20%-80%)
GTX_CLK data clock fall time (80%-20%)
Notes:
1. The symbols used for timing specifications herein follow the pattern t
2. Data valid t
for inputs and t
transmit timing (GT) with respect to the t
signals (D) reaching the valid state (V) to state or setup time. Also, t
to the t
time. Note that, in general, the clock reference symbol representation is based on three letters representing the clock of a
particular functional. For example, the subscript of t
the latter convention is used with the appropriate letter: R (rise) or F (fall).
Max Hold)
GTX
RX_CLK
RXD[7:0]
RX_DV
RX_ER
clock reference (K) going to the high state (H) relative to the time date input signals (D) going invalid (X) or hold
GTKHDV
GMII AC Timing Specifications
GMII Transmit AC Timing Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Parameter/Condition
to GTX_CLK Min Setup time is a function of clock period and max hold time. (Min Setup = Cycle time -
t
FIRH
Table 28. GMII Transmit AC Timing Specifications
Figure 15. FIFO Receive AC Timing Diagram
DD
GTX
t
FIR
of 3.3 V ± 5%.
clock reference (K) going to the high state (H) relative to the time date input
t
FIRDV
GTX
valid data
represents the GMII(G) transmit (TX) clock. For rise and fall times,
t
FIRDX
Symbol
GTKHDX
t
GTKHDX
t
t
t
GTXR
for outputs. For example, t
GTXF
GTK
(first two letters of functional block)(signal)(state) (reference)(state)
symbolizes GMII transmit timing (GT) with respect
1
3
t
FIRF
Min
0.5
—
—
—
t
FIRR
Typ
8.0
—
—
—
GTKHDV
Electrical Characteristics
symbolizes GMII
Max
5.0
1.0
1.0
—
Unit
ns
ns
ns
ns
43