74AVC4T245PW,112 NXP Semiconductors, 74AVC4T245PW,112 Datasheet - Page 13

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74AVC4T245PW,112

Manufacturer Part Number
74AVC4T245PW,112
Description
TXRX 4BIT DUAL 3STATE 16TSSOP
Manufacturer
NXP Semiconductors
Series
74AVCr
Datasheet

Specifications of 74AVC4T245PW,112

Logic Function
Translator, Bidirectional, 3-State
Number Of Bits
4
Input Type
Logic
Output Type
Logic
Number Of Channels
4
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.3ns
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
16-TSSOP
Supply Voltage
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
NXP Semiconductors
Table 14.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
74AVC4T245
Product data sheet
Symbol Parameter
V
t
t
t
V
t
t
t
V
t
t
t
V
t
t
t
V
t
t
t
pd
dis
en
pd
dis
en
pd
dis
en
pd
dis
en
pd
dis
en
CC(A)
CC(A)
CC(A)
CC(A)
CC(A)
t
pd
is the same as t
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
propagation
delay
disable time
enable time
Dynamic characteristics for temperature range −40 °C to +125 °C
PLH
and t
Conditions
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
nAn to nBn
nBn to nAn
nOE to nAn
nOE to nBn
nOE to nAn
nOE to nBn
PHL
; t
dis
is the same as t
1.2 V ± 0.1 V
Min
1.1
1.8
1.5
1.4
0.5
0.5
1.8
1.9
1.4
0.3
0.7
1.9
1.1
1.4
0.1
0.6
1.8
1.7
1.0
1.2
0.1
0.6
1.0
0.7
0.9
0.1
0.6
0.7
0.6
0.8
All information provided in this document is subject to legal disclaimers.
Max
10.4
10.4
12.0
13.7
14.1
14.7
11.3
12.5
10.4
13.3
12.0
12.9
11.5
12.4
11.3
12.4
9.8
7.9
9.6
6.9
9.5
8.0
9.3
5.8
6.9
5.3
9.1
5.7
6.2
4.2
Rev. 2 — 9 December 2010
PLZ
and t
1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V
Min
0.5
0.5
1.8
1.9
1.4
1.1
0.3
0.7
1.8
1.9
1.4
1.4
0.1
0.6
1.6
1.7
1.0
1.2
0.1
0.6
1.0
1.5
0.7
0.9
0.1
0.6
0.7
1.4
0.6
0.8
PHZ
; t
en
Max
12.0
10.6
14.1
11.0
11.3
11.4
10.4
10.6
10.9
10.2
10.4
10.3
7.9
9.8
7.0
7.0
6.6
5.9
9.5
8.0
6.3
4.7
6.9
5.3
9.7
6.2
4.7
6.2
4.2
9.6
is the same as t
Figure
4-bit dual supply translating transceiver; 3-state
Min
0.5
0.5
1.8
1.9
1.4
1.1
0.3
0.5
1.5
1.9
1.1
1.1
0.1
0.5
1.8
1.6
1.0
1.0
0.1
0.4
1.0
1.3
0.7
0.8
0.1
0.4
0.7
1.2
0.6
0.6
9; for wave forms see
V
CC(B)
PZL
Max
12.0
10.5
14.1
10.1
10.4
11.3
6.9
9.6
9.8
5.8
6.6
8.5
5.4
5.4
9.5
9.6
8.0
8.2
5.1
4.3
6.9
9.1
5.3
7.7
5.0
3.9
6.2
9.0
4.2
7.5
[1]
and t
PZH
Min
0.5
0.5
1.8
1.4
1.4
1.0
0.3
0.4
1.3
1.4
0.7
0.9
0.1
0.3
1.3
1.2
0.6
0.8
0.2
0.2
1.0
1.1
0.6
0.6
0.1
0.2
0.7
1.0
0.6
0.5
.
74AVC4T245
Max
12.0
14.1
10.4
Figure 7
11.3
5.8
9.3
9.0
8.7
4.7
6.3
8.2
6.4
4.3
5.1
9.5
7.6
8.0
5.9
4.0
3.9
6.9
6.9
5.3
5.3
3.8
3.4
6.2
7.1
4.2
5.2
3.3 V ± 0.3 V
© NXP B.V. 2010. All rights reserved.
Min
0.5
0.5
1.8
1.2
1.4
1.0
0.3
0.3
1.6
1.2
0.4
0.9
0.3
0.3
1.6
1.0
0.4
0.8
0.1
0.2
1.0
0.9
0.4
0.6
0.1
0.1
0.7
0.8
0.4
0.5
and
Figure 8
Max
12.0
10.1
14.1
10.4
11.3
5.7
9.1
8.5
4.7
6.2
8.4
6.2
4.3
5.0
9.5
7.6
8.0
5.1
4.0
3.8
6.9
5.8
5.3
4.4
3.3
3.3
6.2
6.9
4.2
4.2
13 of 27
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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