MAX5805AAUB+ Maxim Integrated, MAX5805AAUB+ Datasheet - Page 19

• Manufacturer Part Number: MAX5805AAUB+
• Description: Digital to Analog Converters - DAC 12Bit 1Ch V Buffered Precision DAC
• Manufacturer: Maxim Integrated

Specifications of MAX5805AAUB+

• Rohs: yes
• Number Of Converters: 1
• Number Of Dac Outputs: 1
• Resolution: 12 bit
• Interface Type: Serial (I2C)
• Settling Time: 6 us
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: uMAX-10
• Maximum Power Dissipation: 707.3 mW
• Minimum Operating Temperature: - 40 C
• Output Type: Voltage Buffered
• Supply Current: 190 uA
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

Figure 5. Multiple Register Write Sequence (Standard I
Maxim Integrated
Readback of all other registers is not directly supported.
All requests to read unsupported registers read back
the device’s current status and configuration settings as
shown in
on the current clear, gate, and load status of the device
(with a one indicating an asserted status), as well as user
configuration settings for the reference, power-down,
AUX mode, and default operation.
Figure 4. I
Ultra-Small, Single-Channel, 8-/10-/12-Bit Buffered Output
Voltage DACs with Internal Reference and I
SDA
SCL
SDA
SCL
2
Table
START
C Single Register Write Sequence
START
2. The status register contains information
BYTE #1: I 2 C SLAVE ADDRESS
0
BYTE #1: I
0 0 1 1
WRITE ADDRESS
0
WRITE ADDRESS
1
2
C SLAVE ADDRESS
1 0 A1 A0
A
0 A1 A0
ACK. GENERATED BY MAX5803/MAX5804/MAX5805
A
W
W
ACK. GENERATED BY MAX5803/MAX5804/MAX5805
A
A
23
BYTE #2: COMMAND BYTE
23
23
BYTE #2: COMMAND1 BYTE
BYTE #5: COMMANDn BYTE
22
WRITE COMMAND
22
22
WRITE COMMAND1
21
(B[23:16])
21
21
20 19 18 17
(B[23:16])
(B[23:16])
20 19 18 17
20 19 18 17
2
C Protocol)
MAX5803/MAX5804/MAX5805
16
16
16
A
A
A
15 14 13 12 11 10 9
BYTE #3: DATA HIGH BYTE
15 14 13 12 11 10 9
15 14 13 12 11 10 9
BYTE #3: DATA1 HIGH BYTE
BYTE #6: DATAn HIGH BYTE
DATA PAIRS (3 BYTE BLOCKS)
ADDITIONAL COMMAND AND
While
standard I
capable of functioning in an interface verification mode.
This mode is accessed any time a readback operation
follows an executed write mode command. In this mode,
the last executed three-byte command is read back in its
entirety. This behavior allows verification of the interface.
WRITE DATA
(B[15:8])
WRITE DATA1
(B[15:8])
(B[15:8])
the
2
Interface Verification I
C readback of selected registers, it is also
8
MAX5803/MAX5804/MAX5805
A
8
8
BYTE #4: DATA LOW BYTE
7 6 5 4 3 2 1
A
A
7 6 5 4 3 2 1
7 6 5 4 3 2 1
BYTE #7: DATAn LOW BYTE
BYTE #4: DATA1 LOW BYTE
WRITE DATA
(B[7:0])
WRITE DATA1
(B[7:0])
(B[7:0])
2
C Interface
0
A
0
0
COMMAND EXECUTED
A
A
2
STOP
COMMAND1
EXECUTED
COMMANDn
C Readback
EXECUTED
Operations
STOP
support
19