M24256-DRMN6TP STMicroelectronics, M24256-DRMN6TP Datasheet
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M24256-DRMN6TP
Specifications of M24256-DRMN6TP
Related parts for M24256-DRMN6TP
M24256-DRMN6TP Summary of contents
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... Memory array: – 256 Kbit (32 Kbytes) of EEPROM – Page size: 64 bytes – Additional Write lockable page (M24256-D order codes) ■ Single supply voltage and high speed: – 1 MHz clock from 1 5.5 V ■ Write: – Byte Write within 5 ms – ...
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... Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Byte Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Page Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Write Identification Page (M24256-D only Lock Identification Page (M24256-D only ECC (Error Correction Code) and Write cycling . . . . . . . . . . . . . . . . . . 17 Minimizing Write delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 18 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Doc ID 6757 Rev 30 ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF 5.2.2 5.2.3 5.3 Read Identification Page (M24256-D only 5.4 Read the lock status (M24256-D only Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 10 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ...
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... Table 10. Input parameters Table 11. Cycling performance by groups of four bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 12. Memory cell data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 13. DC characteristics (M24256-BW, device grade Table 14. DC characteristics (M24256-BR, M24256-DR, device grade Table 15. DC characteristics (M24256-BF, M24256-DF, device grade Table 16. 400 kHz AC characteristics Table 17 ...
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... Figure 16. SO8N – 8-lead plastic small outline, 150 mils body width, package outline . . . . . . . . . . . . 33 Figure 17. UFDFPN8 (MLP8) - 8-lead ultra thin fine pitch dual flat no lead, package outline . . . . . . . 34 Figure 18. M24256-DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package outline . . . . . . . . 35 bus = 400 kHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . for bus = 1MHz ...
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... The M24256-BW can operate with a supply voltage from 2 5.5 V, the M24256-BR and M24256-DR can operate with a supply voltage from 1 5.5 V, and the M24256-BF and M24256-DF can operate with a supply voltage from 1 5.5 V. All these devices operate with a clock frequency of 1 MHz (or less), over an ambient temperature range of –40 °C / +85 ° ...
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... DU: Don't Use (if connected, must be connected See Section 9: Package mechanical data Figure 3. WLCSP connections for the M24256-DFCS6TP/K (top view, marking side, with balls on the underside) Caution: As EEPROM cells lose their charge (and so their binary value) when exposed to ultra violet (UV) light, EEPROM dice delivered in wafer form or in WLCSP package by STMicroelectronics must never be exposed to UV light ...
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... When Write Control (WC) is driven high, device select and address bytes are acknowledged, Data bytes are not acknowledged. 2.5 V (ground the reference for the V SS 8/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Table 2. When not connected (left floating), these inputs are read as low V CC M24xxx supply voltage. CC Doc ID 6757 Rev 30 ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V in Section 8: DC and AC recommended to decouple the 100 nF) close to the V This voltage must remain stable and valid until the end of the transmission of the instruction and, for a write instruction, until the completion of the internal write cycle (t 2 ...
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... Memory organization 3 Memory organization The memory is organized as shown below. Figure 5. Block diagram 10/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Doc ID 6757 Rev 30 ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF 4 Device operation The device supports the I data on to the bus is defined transmitter, and any device that reads the data receiver. The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization ...
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... Serial Data (SDA) after sending eight bits of data. During the 9 acknowledge the receipt of the eight data bits. 12/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF th clock pulse period, the receiver pulls Serial Data (SDA) low to Doc ID 6757 Rev 30 ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF 4.5 Device addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Table 2 (on Serial Data (SDA), most significant bit first). ...
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... During the internal Write cycle, Serial Data (SDA) is disabled internally, and the device does not respond to any requests. If the Write Control input (WC) is driven High, the Write instruction is not executed and the accompanying data bytes are not acknowledged, as shown in 14/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Figure A13 A12 A11 ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF 5.1.1 Byte Write After the device select code and the address bytes, the bus master sends one data byte. If the addressed location is Write-protected, by Write Control (WC) being driven high, the device replies with NoAck, and the location is not modified. If, instead, the addressed location is not Write-protected, the device replies with Ack ...
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... The transfer is terminated by the bus master generating a Stop condition. Figure 8. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) 16/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF ACK ACK Dev sel Byte addr Byte addr R/W ACK ACK Dev sel ...
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... If the Identification page is locked, the data bytes transferred during the Write Identification Page instruction are not acknowledged (NoAck). 5.1.4 Lock Identification Page (M24256-D only) The Lock Identification Page instruction (Lock ID) permanently locks the Identification page in Read-only mode. The Lock ID instruction is similar to Byte Write (into memory array) with the following specific conditions: ● ...
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... The seven most significant bits of the Device Select code of a Random Read (bottom right box in the figure) must be identical to the seven most significant bits of the Device Select code of the Write (polling instruction in the figure). 18/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256- shown in AC characteristics tables in w Figure ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF 5.2 Read operations Read operations are performed independently of the state of the Write Control (WC) signal. After the successful completion of a Read operation, the device internal address counter is incremented by one, to point to the next byte address. For the Read instructions, after each byte read (data out), the device waits for an acknowledgment (data in) during the 9th bit time ...
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... ID page must not exceed the page boundary (e.g.: when reading the Identification Page from location 10d, the number of bytes should be less than or equal to 54, as the ID page boundary is 64 bytes). 20/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Figure 10. Doc ID 6757 Rev 30 Section 5 ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF 5.4 Read the lock status (M24256-D only) The locked/unlocked status of the Identification page can be checked by transmitting a specific truncated command [Identification Page Write instruction + one data byte] to the device. The device returns an acknowledge bit if the Identification page is unlocked, otherwise a NoAck bit if the Identification page is locked ...
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... European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU. 2. Positive and negative pulses applied on different combinations of pin connections, according to AEC- Q100-002 (compliant with JEDEC Std JESD22-A114, C1=100 pF, R1=1500 ). 3. 3000 V for previous devices (process letters KA). 22/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Table 5 may cause permanent damage to Parameter (2) Doc ID 6757 Rev 30 Min ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256- and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. Table 6. Operating conditions (voltage range W) Symbol V Supply voltage CC T Ambient operating temperature A f Operating clock frequency C Table 7. Operating conditions (voltage range R) ...
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... Table 12. Memory cell data retention Parameter (1) Data retention 1. For products identified by process letter K. The data retention behavior is checked in production. The 200- year limit is defined from characterization and qualification results. 24/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF (1) Parameter (2) Test condition TA 25 °C, V (min) < ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Table 13. DC characteristics (M24256-BW, device grade 6) Symbol Parameter Input leakage current I (SCL, SDA, E2, E1, LI E0) Output leakage I LO current I Supply current (Read Supply current (Write) During t CC0 Standby supply I CC1 current Input low voltage V IL ...
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... DC and AC parameters Table 14. DC characteristics (M24256-BR, M24256-DR, device grade 6) Symbol Parameter Input leakage current I LI (E1,E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage V IL (SCL, SDA, WC) Input high voltage ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Table 15. DC characteristics (M24256-BF, M24256-DF, device grade 6) Symbol Parameter Input leakage current I LI (E1, E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 ...
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... WC=0 set up time condition to enable the execution of a WRITE command. 7. WC=0 hold time condition to enable the execution of a WRITE command. 28/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Parameter Clock frequency Clock pulse width high Clock pulse width low SDA (out) fall time ...
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... NS 1. Only for M24256 devices identified by the process letter K. 2. There is no min. or max. values for the input signal rise and fall times however recommended by the I²C specification that the input signal rise and fall times be less than 120 ns when f 3 ...
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... DC and AC parameters Figure 12. Maximum Figure 13. Maximum 30/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF value versus bus parasitic capacitance (C bus C bus at maximum frequency f value versus bus parasitic capacitance C bus C bus at maximum frequency f Doc ID 6757 Rev 30 ) for bus = 400 kHz C ) for ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Figure 14. AC waveforms Doc ID 6757 Rev 30 DC and AC parameters 31/40 ...
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... TSSOP8 – 8-lead thin shrink small outline, package mechanical data Symbol Values in inches are converted from mm and rounded to four decimal digits. 32/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF millimeters Typ. Min. Max. 1.200 0.050 0.150 1.000 0.800 1.050 0.190 0.300 0.090 0.200 0.100 3 ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Figure 16. SO8N – 8-lead plastic small outline, 150 mils body width, package outline Drawing is not to scale. Table 19. SO8N – 8-lead plastic small outline, 150 mils body width, package data Symbol ccc ...
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... (2) eee 1. Values in inches are converted from mm and rounded to four decimal digits. 2. Applied for exposed die paddle and terminals. Exclude embedding part of exposed die paddle from measuring. 34/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF millimeters Typ Min Max 0.550 0.450 0.600 0.020 ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Figure 18. M24256-DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package outline 1. Drawing is not to scale Doc ID 6757 Rev 30 Package mechanical data 35/40 ...
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... Package mechanical data Table 21. M24256-DFCS6TP/K, WLCSP 8-bump wafer-level chip scale package mechanical data Symbol (number of terminals) aaa bbb ccc ddd eee 1. Values in inches are converted from mm and rounded to four decimal digits. 36/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF ...
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... M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF 10 Part numbering Table 22. Ordering information scheme Example: Device type 2 M24 = I C serial access EEPROM Device function 256 = 256 Kbit ( Device family B = Without Identification page D = With additional Identification page Operating voltage 5.5 V ...
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... Table 18: 1 MHz AC characteristics Moved: – Table 2: Most significant address byte Deleted: – Table 3: Device select code to access the Identification page (M24256- DR only) – Table 25: Available M24256-BR, M24256-BW, M24256-BF products (package, voltage range, temperature grade) – Table 26: Available M24256-DR products (package, voltage range, ...
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... Table 21: UFDFPN8 (MLP8) 8-lead ultra thin fine pitch dual flat package no lead mm, mechanical data Datasheet revision 25 split into: – M24256-125 datasheet for automotive products (range 3), – M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF (this datasheet) for standard products (range 6). Added: – ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 40/40 M24256-BW M24256-BR M24256-BF M24256-DR M24256-DF Please Read Carefully: © 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies www ...